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The Super_IO Board
  Final Board 

Introduction.            

S100Computers has a number of well established IO boards by now. All are fairly well debugged and seem to function correctly. Some are almost 10 years old by now. Since that time the have been a number of advances in small computer interfaces.  Boards like the Raspberry Pi or Arduino series have revolutionized computer interfacing.  Many add-on "modules" have been developed that allow quite powerful computer setups. There is no reason why these modules cannot be incorporate into S100 Bus Systems as well.

This "Super-IO Board" is a step in this direction.
It contains the following components/S100 Bus IO interfaces:-
 
1.    A USB port that passively updates a connected PC of the boards status, errors etc.
2.    A second independent USB IO port available on the S100 Bus for general external use.
3.    A generic RS232 Serial port capable of operation up to 115,200 Baud with a DB9 Connector and a 8X2 Pin Connector
4.    A Centronics compatible printer parallel port.
5.    An SPI interface port
6.    An I2C interface port
7.    A RC Systems V-Stamp speech synthesizer
8.    A RTC calendar/time of day clock interface
9.    An 8255A with a 3 port parallel port I/O
10.   An Adafruit FX Sound Board output
11.   A DFRobot MP3 Player output
12.   An onboard buzzer.
13.   A 555 chip based pulse circuit
14.   An 8 LED indicator array.
15.   An 8 bit input configuration switch.
16.   A PS2 keyboard port with socket
17.   A local WiFi interface (ESP 8266) connection
18.   A Cyclone IV FPGA controls everything and has an S100 bus command driven interface for printer buffering, time display formatting etc.


In one sense this board is a combination of the hardware on our  earlier
FPGA Board, our FPGA V2 Board, our Serial IO board, and out FPGA driven Z80 SBC Board.

If you are not familiar with FPGA's you need to read up on them. We have used them successfully on a number of our recent boards (e.g. a Z80 and 80286 SBC)Much of what is written here assumes you are familiar with those boards.  There are introductions to FPGAs there as to how to program and use them.  If this is your first FPGA board you really have to read the write-ups on these boards first.  Unfortunately recently chips like the Cyclone IV have become rare/expensive. The Waveshare FPGA board is currently almost 10X its old price. Hopefully these prices will come down soon. Meanwhile an option is to pull a Waveshare board from a previous FPGA board.


Please read:-  FPGA Programming for S100Computers Boards 

All the text below assumes this.


We will utilize the same Waveshare Cyclone IV board as we have done in the past.  This board contains all the circuitry to program the FPGA as well as onboard ROM etc.

The great thing about utilizing an FPGA chip like this is we can program it to act exactly like a very fast (40mHz) Z80 CPU with its own programmable ROM.  While RAM could also be programed into the FPGA.  Unlike previous boards the FPGA Z80 does not require a lot of RAM, so we will place the Z80 RAM (8K) inside the FPGA as well.

There is a FPGA Z80 accessible configuration IOBYTE switch (
SW1) that is largely unused at the FPGA Z80 port (46H).  However its bit 7 determines how the FPGA Z80 behaves on power up/reset.  If open,  (1H) the FPGA Z80 will boot into "monitor mode".  As in most of our earlier FPGA boards the diagnostic monitor control options are available.  Here is a typical display.
    Monitor Signon
The default baud rate for this connection is (38,400 BAUD, 2 stop bits, no parity). When in Monitor Mode Bit 0 (LED D3), will light up.

Remember this IOBYTE port is local to the FPGA Z80, not the S100 bus Z80.
By now most of the Menu options should be familiar to you.  While its critical to the board build/debug process, for an S100 bus CPU/operating system it is not utilized.

Once debugged is done, the IOBYTE switch
bit 7 should be closed. Upon reset the FPGA Z80 comes up in "CMD mode". 

CMD Mode Signon
When in CMD mode LED D1 will light up.

This is the same approach we recently used for our FPGA Disk Controller boards.
The FPGA will continuously look at the S100 bus IO ports
40H and 41H for commands.  Currently the commands are:-

CMD
80H    Obtain the Date and Time and send as a string to the S100 bus
CMD
81H    Set the Date and time on the Super IO Board RTC chip.
CMD
82H    Collect a printer character string,  buffer it and return while the printer is printing.
  
Clearly many more can be added to suite your needs.

Step By Step Building the Super IO Board
The build instructions are fairly simple for this board but because it is a complex board building it should not be rushed.  As always, first examine the bare board carefully for scratches or damaged traces, use a magnifying glass if need be.  A broken trace is almost impossible to detect by eye on a completed board.
   
Solder in all the required IC sockets, resistors, resistor arrays, capacitors, jumpers, and the Pololu 5V and 3.3V voltage regulators.  Please be sure you put the resistor arrays in with the correct orientation of pin 1, (the square pad). An incorrect orientation is one of the most difficult things to detect/debug on a board if not noticed. Check their values before soldering (they are difficult to remove).  Insert all jumper arrays.  

There appears to be a few variations of the
74LVC245 20 pin DIP level Shifters chips with "A", "AN" etc. after the 245.   As best I can tell so long as they are 20 pin DIPs they are all OK. I use either Mouser chips # 595-SN74LVC245AN.   The WaveShare Cyclone IV adaptor can be obtained directly from Waveshare or Amazon.

The WaveShare unit uses unusual 2mm dual row female pin connectors. Unlike to normal 0.1" connectors these are quite rare an expensive (Digi-Key
#S5750-30-ND). You need to carefully cut them to size, carefully cutting off the extra pins with a wire cutter.  Better sockets are available from Mouser (Preci-dip 833-87-038-10-001101 as part 437-8338703810001101 for $3.04 each.  If you use the Digi-Key sockets tape a strip "Scotch Tape" on the front of the board where the sockets lie. Pierce the tape with the connectors. This prevents the solder from getting weked into the socket pins.  If you use the Mouser sockets try and place then slightly above the board surface to avoid contact with the traces that run between them. Also be very careful to get the correct Perci-dip sockets. I recently got sockets from another brand. The Waveshare board pins would not go into them even though they looked similar.  You can use any Preci-dip sockets just cut/splice them to length on the board.

Please also note these Digi-Key
#S5750-30-ND sockets for the WaveShare adaptor are quite tricky to fit on to the board.  I found the best way to do it is (after trimming to size), push them half way on to the adaptor pins and then wiggle them to fit the whole unit on to the S100 board.  Figure on spending 10 minutes on this step!  Do not solder them to the board first and then try and press the adaptor down on them. They are very fragile and internally the leaves will bend if socket angles are not exactly correct.  When in place, check each pin is visible on the back of the board before soldering.  Only then solder all around.  Add as little solder to each pin as possible - the narrow pins have a tendency to wick up solder internally.  The Mouser ones don't have this problem but you  need two of then for the FPGA side pins. All sockets need to be trimmed to the requires pin number.  The 2mm spaced male pin headers are DigiKey #0877584416

BTW, to remove the FPGA adaptor,  leaver each corner up a little going round and round. The first time its quite difficult to get the adaptor out. It gets easier with time.

I use the Adafruit USB serial Adaptor, but the equivalent SparkFun unit also works fine.

Note there are two sockets for the Pololu 5V and 3.3V regulators. While the older ones (D24V25F5 and
D24V25F3) are still available and use P3 and P4, it seems Pololu is suggesting users use the newer D24V22F5's (5V, 2.5 Amp) units, it has a different pinout, use this one in P2 (not P3).  More recently they also added the equivalent D24V22F3 3.3V regulators. Unfortunately in their wisdom they again changed the pinout connections. You must use the Pololu D24V25F3 3.3 V regulator in P4 or the D24V22F3 regulator in P21.   Be sure you get these regulators/ correct. To be safe once inserted, check the voltage in your system on a 5V and 3.3V IC, (see the schematic) with no chips yet inserted on the board. 5V and 3.3V going to the correct pins of the FPGA adaptor.  (5V going to the 3.3V pins will blow the unit!).  Please note Pololu has come out with more 5V and 3.3v regulators.  Please examine the pinouts and match them with the board sockets.  Unfortunately the newer 5V and 3.3V units look exactly the same on the surface. Presumably some of the internal resistors are different to give 5V and 3.3V.

Note recently the above Pololu regulators have gotten hard to find and have become expensive.  Pololu now has more options to pick from.  Examine the pinout of any of their 5V or 3.3V  regulators and place them in one of the two sets of slots above.  You can also use the EZ-SBC regulators. These are currently cheaper and as best I can tell just as good -- though they have a larger footprint however.

When adding the LED's be sure to orient them correctly. (Usually the longer lead in the square pad).

The 20 pin DIP version of the DS 1505 RTC chip is currently in short supply.  In case people cannot obtain one I have added a footprint for the SMD version of the chip as well.   They both work exactly the same.  If you do use the SMD chip solder it to the board before anything else.  It's difficult to do so later.
          
    1508 RTC Chip
    
There are many types/sizes of 3V coin batteries and adapters. Jameco sells many holders. The 1" #236996 with a CR2032 is common. So long as it's 3V types don't matter. The RTC chip battery should last for years!

Please take care to not "slobber" solder on the sockets. They are very closely spaced on this board with vias often close to a socket pin - particularly for the FPGA adaptor sockets.
         
At this point insert the board into your system and check your S100 bus Z80 monitor boots fine.  If not check for solder bridges etc. Also do one last check to be sure every IC solder pin is soldered.  Seems trivial, but I don't know how many times I got caught with this error.
 
 Here is a picture of (a prototype version) the board at this stage:-
   
  Before Chips
     

If you are not completely familiar with programming the Cyclone IV FPGA please study in detail this write-up Programming a Cyclone IV FPGA.
Plug the board into your system and check you are getting 5V and 3.3V from the voltage regulators.

Next we need to solder in the four ICs U10, U2, U18 & U1 directly to the board.  If possible use known working 74LVC245's from a previous board.  You don't want to have to remove a faulty one later. Take care not to scorch the chips. If possible have the chip pin just barely show on the back of the board for soldering. Also note U18 is a 74LS244 (not a 74VLC245).

The board has complete flexibility in setting the IO port designations for the various components. 16 bit port addressing can be used but normally you would only decode 256 IO ports. This is done by jumpering
K2 2-3. I have used the following "block" port designations:-

PS2$STATUS$PORT         EQU 0DAH            ;IBM-PC PS2 Keyboard port on S100 bus (P16, P24)
PS2$DATA$PORT           EQU 0DBH

USB$STATUS$PORT         EQU 28H              ;USB Status Port (P40)
USB$DATA$PORT           EQU 29H              ;USB Data Port

SERIAL$STATUS$PORT      EQU 88H              ;RS232 SERIAL Status Port (P17, J1)
SERIAL$DATA$PORT        EQU 89H              ;RS232 SERIAL Data Port (P17, J1)

SPEECH$STATUS$PORT      EQU 8AH              ;Speech Status Port
SPEECH$DATA$PORT        EQU 8BH              ;Speech Data Port

PARALLEL$A              EQU 8CH              ;8255A Port A
PARALLEL$B              EQU 8DH              ;8255A Port B
PARALLEL$C              EQU 8EH              ;8255A Port C
PARALLEL$D              EQU 8FH              ;8255A Port D (Control Port).

DFP$SOUND$STATUS$PORT   EQU 2AH              ;DFP Sound card (P42)
DFP$SOUND$DATA$PORT     EQU 2BH              ;DFP Sound card

FX$SOUND$STATUS$PORT    EQU 2EH              ;AdaFruit FX Sound card (P32)
FX$SOUND$DATA$PORT      EQU 2FH              ;AdaFruit FX Sound card

WIFI$STATUS$PORT        EQU 2CH              ;WiFi Status Port (P38)
WIFI$DATA$PORT          EQU 2DH              ;WiFi Data Port

This port configuration can be obtained with the following switch configuration:-
   
  Board Switches

These port blocks are fed into the FPGA where the individual port components are branched out. 
To check a port block input on the S100 bus input that port (from your Z80 monitor) and check pin 19 of the relevant 74LS682 pulses low. Study the schematic.
It's also important to be sure you are not using ports used by another board in your system.
Remove the Super IO board and check for active ports with the Z80 master "R" command.  None should show for the above ports.

Carefully insert the WaveShare Cyclone IV adaptor in its sockets.   Power on the  computer.  "Virgin" Cyclone IV Adaptor boards from WaveShare may have a FPGA preloaded with a program (in the EPCS16 Flash RAM) that already that pulses its 4 onboard LEDs.  Previously programmed by you FPGA boards of course will not.

In any event open the  Quartus SUPER_IO BOARD project folder (the expanded
SUPER_IO.ZIP download, see bottom of this page) and program the FPGA using the SUPER_IO.bdf file. 

Now would be a good time also to study in detail the
SUPER_IO.bdf  file to understand how the board "works".  Remember the FPGA utilized its own internal 30-40 MHz Z80 and so utilizes  a .HEX file for its ROM code.  This .HEX file resides in the SUPER_IO\ROM_HEX_FILES sub-folder.  The source  for this file  is SUPER.IO.Z80.  You don't need to alter this file for normal use but its also provide in case you need to.  

Should you wish to "play around" with this file,  I supply it and its components in the folder
Super_IO Board where it can be assembled on a PC using Altair.com etc. Be sure to move the final SUPER_IO.HEX file to the Quartus SUPER_IO\ROM HEX FILES folder when done as Quartus is counting on finding the SUPER_IO.HEX file there (or readjust the ROM Module Properties in the .bdf file)

If you program the onboard Cyclone IV FPGA at this point nothing will happen except the LED D10 (Board Active) LED will pulse.  This must happen. Do not go further unless it does.
Next  install all the 74xx chips on the board.  Do not install U15 (MAX232) yet.

Install U9  the DS13065 RTC chip if you have not already added the SMD version.

Install a Sparkfun FT231x USB adaptor in
P11.  Note it has a jumper on its back for 3.3V operation, use 3.3v not 5V. You can solder the adaptor directly to the board or use sockets.  See the section above on soldering sockets. I suggest direct soldering.  Note the USB FT231x  adaptor actually has 3 sockets. The two side ones are not used here and are only there to steady the adaptor on the board. I use only pin 1 in each case. You can also use the Adafruit CP2104 USB adaptor equivalent adaptor.  Perhaps it's just me,  but sometimes I've had problems getting this adaptor to link up with my PC's.

The default software on this board assumes a USB port running at
38,400 BAUD, 2 stop bits, no parity.  (This can be changed within the SUPER_IO.bdf file).  There are a number of Windows/PC programs you can use to receive and display the data.  I like Absolute Telnet  from Celestial Software, but others are free.

As mentioned above, the board has an "IOBYTE" switch (
SW1), which defines what the SUPER_IO monitor does on power up.  All switches open, (no switch) causes the Z80 monitor to get 0FFH from port 46H after a reset.  Normally however we will close SW1 bit 7. This will give an IOBYTE value of 01111111. This is the boards normal mode of operation.   Bit 0 (Pos 0), (Reading right to  left), when closed, (xxxxxxx0H), this causes the board to send status information to the USB port during its operation.  A remote PC can thus watch how commands sent from the S100 bus are operating during any IO operations. This slows things down but is invaluable for debugging etc. When open, no commands are sent. 
To have the board boot directly into its Z80 Monitor upon reset set the IOBYTE switch (SW1) to
11111111 (all switches open).

  
The Super IO Board Diagnostic Program
There are a lot of "moving parts" on this board.  A good diagnostic program running on the S100 bus is required to debug each component. 
SIO_DIAG.COM (download from the bottom of this page), does this. It is menu driven with a sub menu for each component.  It should be run at 100H in the S100 bus RAM. There is an equate in the code to also allow it to run with a CPM BIOS or directly via the Propeller Console IO board.

Here is the
SIO_DIAG Signon Menu:
  
      
   Main Menu

The USB Port Monitor Circuit.

We will start with the easier components first.  The USB Port FPGA Z80 Monitor circuit (P11)
is the identical circuit we used on all our previous FPGA Controller driven boards.
Set your PC USB port TTY program to
38,400 BAUD, 2 stop bits, no parity. Be sure to set the board IOBYTE switch (SW1) is set to 01111111B. 
The FPGA Z80 monitor should sign on upon power on/reset as describe above.

The RTC Circuit.
The RTC circuit (
U9 DS1303) is the identical circuit we used on the FPGA_DC disk controller board.
Install the coin battery.
If you are using the SMD chip, check for solder bridges between the pins.  The crystal must be 32.768 KHz,  (Jameco #14584).
The first time the chip is used it must be "Initilized".  This can be done either in the Super IO Board FPGA Z80 Menu or the S100 Board Diagnostic program using the set time menu options.  Power down the board and restart later to see that the time is still accurate.
The data returned to the S100 Bus with the
81H Command is in the format of the following 14 character string:-
20210722131004
All ASCII characters. The format is 24 hours.
Here is what to output looks like with our
SIO_DAIG.COM program.  (Remember to use this program the SIO Boards IOBYTE bit 7 must be 1 - closed).
    
    RTC Menu


The Parallel Printer Port.
This circuit is identical to the parallel port we have on our
FPGA Z80 SBC Board.
Bring up the SIO_DIAG Diagnostic program and use the
P menu option to send a test string to the printer.  These days many printers use a USB connection instead of a Centronics printer port.  You can use one of the common Centronics -> USB port adaptors instead to test the port.
When connected properly the two printer LED's should light up.
    
    Printer Connection
 
Here is what the test printout should look like:-
  
    Printer Test


The PS2 Keyboard Port.
This circuit is identical to the parallel port we have on our FPGA Z80 SBC Board.
It is quite useful because the old Non IBM ASCII keyboards are getting hard to find.  The FPGA Module does the basic conversion of the PS2 key codes into standard ASCII.
Load the SIO_DIAG Program and use the "K" Menu option to test a keyboard hooked up to the board PS2 socket.
     
   PS2 KeyboardJPG



The Second USB Port.
This port is identical to the USB Monitor port.  It is there in case you need a USB port connection to other hardware.
It appears on the S100 bus as a serial port with its status port at 
28H and the data port at 29H.
Use the
SIO_DIAG Program "T" Command to test  a PC USB port TTY program at 38,400 BAUD, 2 stop bits, no parity.
  
    Second USB Port

You can examine the routines USB$CO, USB$STATUS and USB$CI in SIO_DIAG to incorporate the port in other programs.
Remember these are S100 bus addressable modules. You can use the above code in any program.

The RS232 Serial Port.
The RS232 Serial Communications Protocol has been in popular use for over 70 years.  These days it's replaced by USB but there are many vintage devices that require it.
I have added one general purpose circuit to the board complete with configuration jumpers, Baud rate etc.

For most PC serial ports the only signals you really will need to download/upload data are:-
TXD, RXD, CTS and RTS.  You will need to cross these signals as follows:-
  
   RS232 Pinouts
    
There are two types of RS-232 Sockets. The older 25 pin sockets and the newer smaller 9 pin sockets. Unfortunately the pin designations are different for each type.   The Clear to Send and Request to Send lines are required in particular on the S-100 side of the connection to prevent data getting lost while the CPU is busy. If you  running a system at less than 1200 Baud even they are usually not required.

The board has the
CTS, RTS, TXD and RXD signals .  All four signals are converted to +/-12 Volts by U15 (a MAX 232).  (Be careful with a logic probe on these signals).
Debugging RS232 connections can be very frustrating.  The easiest thing to do is first a 'loop around" test.  Instead of the MAX232 level converter chip construct a socket with two jumpers so you directly connect
RXD to TXD as shown here:
   
   RS232 Jumpers
  
Test with the R command:-
     RS232 Echo test
 
Once you have this working you can insert the MAX232 chip and again jumper RXD to TXD on P17.
     
    RS232 Jumpers2
 
Only when this works correctly should you try a "real" RS232 I/O port on a PC.


The RC Systems V-Stamp Speech Synthesizer

In the late 70's primitive Voice Synthesizer chips started to become available. A popular S-100 board was the Computalker CT-1 board.
Things have come a long way since them. Not only in the size of the chips but the quality of the speech. 
 
  V Stamp Picture
V-Stamp Voice Synthesizer

Today very realistic speech can be generate with a single chip IC.  One particular system that I like is the V-Stamp system by RC Systems. It is based on their RC8660 chip set.  See here for a complete description. The 24 pin package behaves as an idiot proof black box. You send simple ASCII text strings to the chip over a serial line (5 Volt, TTL level signals).  Once the chip receives an ASCII
0DH (CR), it speaks out the string with amazing intelligence.  Numbers, for example, are pronounced in full (32,800 Baud is spoken as thirty two thousand eight hundred Baud).   The chip even has circuitry to figure out the communication Baud rate automatically on reset.

Insert the chip into the sockets P16 & P24. Be sure its pin 1 in at pin 1 of P16.

Debugging is easy! In RAM at 0H:-
3E 33
D3 8B         ;This assumes the Serial port  8BH is being used to communicate with the chip.
3E 0D
D3 8B
C3 00 00.


This sends "3" followed by a CR to the chip. It says the number "3".
There is an equate in the SIO_DAIG.COM program to set the UART address range. The
SIO_DIAG.COM will always initialize the Zilog UART before using it.

The chip and board must be connected to an external speaker/amplifier (either via P31 (or with jumpers on P15, to   P48). 
Once you start adding voice feedback to your programs you find yourself always doing so. You can send information in voice form that will not upset the current CRT display. Quite useful.
 
The V-Stamp chip can be obtained here from RC Systems.  They have a 3.3V and 5V version. I use the 5V version (2 min speech storage capacity,  #RC860F-1C). Unfortunately it is not cheap ($75), but it's an amazing device. 

One other point, the pins on the V-Stamp "chip" are quite thick.  I used a 28 pin DIP socket cut in half to seat the chip. Be sure beforehand the socket will accommodate the pins. Some Auget sockets will not.  

You can test the chip with the
SIO_DIAG using the "S" menu command.

The 8255A I/O Ports.
This chip, U9, is a very well used chip on S100 boards.  It has 4 I/O ports. The first 3 (A,B & C)  are configurable by its Port C.  They can be input, output or bi-directional depending on what is sent to port C.  For example if you send
80H to port C then ports A,B & C are configured as 8 bit output ports. The three 8 bit I/O pins are available at P29, P35 and P4.
 
The SIO_DAIG.COM program has a menu option to allow you to set or read the 8255A ports.  The code is simple and straightforward.
Insert U9 on to the board.
Here is an example of the output.
  
    8255 Menu
 
You can use the code in this example for any S100 bus program.




The Adafruit FX Sound Board
  
    FX Board Picture
  •   
    This is the first new circuit we will add to this board.  It will allow you to add audio/sound effects to your next S100 bus project without an Arduino or Raspberry Pi board. Up until now it has been very hard to find a simple, low cost audio effects trigger circuit that is easy to use and does not require any external module programming. There's all sorts of tricks with ISD chips or recordable greeting cards out there, but they never sound any good. The Adafruit Sound Board is a very nice solution.
      
    The Sound Board has a lot of amazing features, you don't even need an SD card, there's 2MB or 16MB of storage on the board itself, so you can store up to 15 minutes of quality compressed audio. (Double that if you go with mono instead of stereo). There is a built in Mass Storage USB port,  so you can drag and drop sound files on as if it were a USB drive.   You can use compressed
    Ogg Vorbis files for longer audio files, or uncompressed .WAV files.  Up to 11 Triggers can be connect up to 11 buttons or switches, each one can trigger audio files to play,  or you can send commands from the S100 bus system. Also there are  Five different trigger effects - by changing the name of the files, you can create five different types of triggers which will cover a large range of projects without any programming.

    This is a fairly complicate device to understand with many options.  You should read in detail the Adafruit manual before working with it. See here.

    It is a completely stand-alone unit, it just needs a 3 to 5.5VDC power supply.
    You don't even need an SD card, there's 2MB or 16MB of storage on the board itself.
    You can store up to 15 minutes of quality compressed audio. Double that if you go with mono instead of stereo.
    There is built in Mass Storage USB on the device. Plug any micro USB cable into the Sound Board and from your computer you can drag and drop your files right on as if it were a USB key.
    It utilizes Compressed or Uncompressed audio - Go with compressed Ogg Vorbis files for longer audio files, or uncompressed WAV files.
    High Quality Sound - You want 44.1KHz 16 bit stereo? Not a problem! The decoding hardware can handle any bit/sample rate and mono or stereo.
    There are 11 "Triggers" - Connect up to 11 buttons or switches, each one can trigger audio files to play (or use jumpers to one of the boards parallel ports).
    Stereo line out - There's a breakout for both left and right channels, at line level, so you can always hook up to any kind of stereo or powered speaker
    Five different trigger effects - by changing the name of the files, you can create five different types of triggers. This will cover a large range of projects without any programming.
        
  • Install the Adafruit FX module in its sockets P32 & P33
  • Its best to listen to the boards output using the boards stereo headphone socket. To use the module onboard speaker jack to connect up head phones or a speaker.

    In order to fully utilize this module you really need to study the manual in detail, see here before going any further.

    You need to download the very simple basic sound files at the bottom of this page for testing.  Hookup the USB port to your PC (it appears as a drive), and drag the files across.
    Launch the Super IO Board Diagnostic Program and open the
    F sub menu.
    Here is how it should appear:
        
    FX Board Menu

Most of the options are self obvious.  When the sound says "
track x" that just a filler for a sound track you would add. 
To start use menu 0 to list files and 7 to play a file  (e.g.
SAMPLE2.OGG).  
Please read the Adafruit manual to go further there are many options available with this board hooking up to the boards pins with a cable/switches..

  • The module also has 11 "Trigger pins"  connected up to the P11 header.
  • There are 5 different "Trigger effects".  By changing the name of the files, you can create five different types of triggers which will cover a large range of projects without any programming

 

What is mean by trigger effects? Well, depending on your project you may need to have audio play in different ways. Adfruit thought of the five most common needs and built it into the Sound Board --  so you just rename the file to get the effect you want. See the product tutorial for more details
  1. In summary:
  2. Basic Trigger - name the file Tnn.WAV or Tnn.OGG to have the audio file play when the matching trigger pin nn is connected to ground momentarily
  3. Hold Looping Trigger - name the file TnnHOLDL.WAV or .OGG to have the audio play only when the trigger pin is held low, it will loop until the pin is released
  4. Latching Loop Trigger - name the file TnnLATCH.WAV or .OGG to have the audio start playing when the button is pressed momentarily, and repeats until the button is pressed again
  5. Play Next Trigger - have up to 10 files play one after the other by naming them TnnNEXT0.WAV thru TnnNEXT9.OGG. Will start with #0 and each one on every momentary button press until it gets through all of them, then go back to #0
  6. Play Random Trigger - just like the Play Next trigger, but will play up to 10 files in random order (TnnRAND0.OGG thru TnnRAND9.OGG) every time the button is pressed momentarily

 

The sound board is designed to be simple: it does not have polyphonic ability, can't play MP3's (MP3 is patented and costs $ to license, so this board uses the similar but not-patented OGG format, there's tons of free converters that will turn an MP3 into OGG), isn't reprogrammable or scriptable, and you can't have any other kind of trigger type. However, there's a good chance the project you want to make will work great.

  

Adafruit designed this board specifically for people who wanted to make props, costumes, toys, and other small portable projects.
Please note that I have duplicated the 8 printer port pins (p32) along side the Adafruit FX Sound Board p33 header. With jumpers you can program the sound output as described by Adafruit.  Just send/set bits on the printer port (without sending the printer strobe pulse of course).   Please study the schematic to see how outputs from this module are connected.
  
     FX Module on Board

You can add headphones directly through its top socket. Or you can add a speaker via Jumper P48.
Click sample.ogg to hear what the file sample.ogg should sound like on this device.

The
DFRobot MP3 Player
 
    DF Player
 
This is another powerful module in a small package.  Again you need to study the manual before using the module.  The manual can be found here.
The module can be used as a stand alone circuit and has numerous RX/TX capabilities.
It supports sampling rates of (kHz): 8/11.025/12/16/22.05/24/32/44.1/48and and has a  24 -bit DAC output, supports a dynamic range 90dB
It fully supports FAT16 and FAT32 file systems, and has maximum support of 32G of the TF card, support 32G of U disk, 64M bytes NORFLASH,  a variety of control modes, I/O control mode, serial mode. It supports up to 100 folders, every folder can hold up to 255 songs, 30 level adjustable volume, 6 -level EQ adjustable .

Insert the module in the sockets
P46 and P47.  Insert headphone/speaker in P52 (Jumper P15 1-2 and 7-8, remove any others). You can also use 1-3 of P45 to connect to a separate speaker.  In order to fully utilize this module you need to study the manual here before going any further.  Please study the schematic to see how outputs from this module are connected.
 
Launch the Super IO Board Diagnostic Program and open the "
D" sub menu.
Here is how it should appear:
  
   DFP Player Menu

You can have up to 30 "Tracks". I have only 3 so far. If you don't hear a sound trying increasing the volume (~15 is best).
You communicate with this module over a serial line at 9600 Baud. All commands are sent in an 8 byte string.
  
Here is a list of some of the control commands. There are others for query of the device.
    
  DFP Commands
 
The DF Player manual describes in detail how to interface with this device.   One problem with this module is that does not seem to be a way to list the files on the SD card in the module.   Of course you can do so by putting the SD card in to your PC.  Here is an example:
 
     DFP Files

To test use menu "5" to play all 3 short tracks.




The ESP-8266 WiFi Module. 
    ESP-8266
   

The ESP8266 processor from Espressif is an 80 MHz microcontroller with a full WiFi front-end (both as client and access point) and TCP/IP stack with DNS support as well. While this chip has been very popular, its also been very difficult to use.   It absolutely will not tolerate voltages above 3.3v.

 

Interfacing directly with the FPGA pins is clearly not a problem.  The unit is unusual in that it assumes by default a high baud rate of 11500 Baud (actually 57600 initially).
I could not get it to interface to our FPGA serial ports correctly at 115000 baud.  I could send AT commands but always got junk character replies.
Fortunately it is possible to change the power-up baud rate on this unit.  However to do so you need to get a ESP8266->USB adaptor.  The are many.
  
    ESP8266-USB Adaptor

You will also need a program like PuTTY to interface/program it (see the bottom of this page for a download).
Initially you will need to configure PuTTY for Serial,
115,200 baud and the correct PC COM port to talk to it from your PC.
Then carefully enter:-
AT+UART_DEF=9600,8,1,0,0
then
CR, then Control J (LF).

Reload the PuTTY program and this time configure it to
9600 baud (and the COM port).
The ESP8266 should signon with
Ready.
It should also respond to "
AT" commands:-
   
    AT Command
You now have the ESP8266 configured to work at 9600 Baud.  You can insert it into the Super IO Board P10 socket.

I have some example software in the SIO_DIAG program (use the "W" menu option). 
You will see for example "
AT+CWLAP" returns all the local WiFi networks:-
  
    WiFi menu

Please note interfacing with the ESP8266 is quite tricky.  When commands are sent it can take quite some time to receive a complete response.  I simply use a continuous status check loop and use the keyboard ESC key to terminate the loop process.    A proper program would use an interrupt to collect ESP8266 feedback responses.

 
The SPI and I2C interfaces
SPI and I2C interfaces tend to be very hardware specific. While the FPGA can be easily used to provide the correct SPI/I2C handshaking/protocol, each needs to be configured for the data width etc.  We have already used one SPI module on this Super IO Board for the RTC chip (see above) and we have used SPI on the FPGA V2 Board as well as I2C on the same board.  Please use these example if you need to use these to I/O Ports on this board.

The 555 Pulse Timer
I have also added a simple 555 based variable pulse generator to the board. The circuit is from the SMB. The pulse goes to both the FPGA (via U10, FPGA pin T11) or directly to the S100 bus vector interrupt pins. The variable cap C14 adjusts the speed of the pulse (slightly). BTW the DS1305 RTC also can be used to send regular pulses directly to the FPGA.  Use the 555 for longer pulses (~1 second) and the RTC for short ones.  Changing the value of C26 to 10uF and above will give much further apart pulses.
      
    555 Circuit
  
Board Height.
There is slight issue with board height in the S100 bus.  The programming socket of the Waveshare FPGA adaptor also prevents the board fitting into a single S100 bus socket. For most motherboards you can handle this by trimming the plastic shroud around the programming socket.   It may be necessary to snip a little off the top of each pin as well.
 
A more elegant solution is to replace the above socket with a right angled one.   This I only recommend to expert solders. Heat each socket pin on the back of the socket and with a tweezers pull it straight out when it is hot.  It must be quite hot and come out easily. If not, you will rip off the attached PCB trace to the pin.  Clean out the holes (10) with a suction desoldering gun and insert a right angled 5X2 header socket as shown above.  I was almost reluctant to suggest this approach. Only use it 1, after a final programming of the FPGA and 2, you are an expert in soldering and desoldering.


Burning FPGA Code to Flash RAM
Up until now whenever we programmed our FPGA via  the JTAG socket an the above boards the data is lost whenever the power is turned off.   While fine for code development etc. it is not desirable for a final board configuration.  Like most FPGA applications the "final" code is saved in Flash RAM and immediately loaded by the FPGA each time upon power-up.  This is a standard and common characteristic of most FPGA's. Some older models in fact had a ROM onboard.    Our Cyclone IV Adaptor board has 16MB of Flash RAM on board for this purpose -- way more than we are ever going to need!

The tricky part is programming this Flash RAM.  I found the Intel documentation poor and confusing.  Here is a summary of the process: 
  
Within Quartus you need to "convert" your normal JTAG FPGA .sof programming file to a special file .jic to program the Serial Flash RAM chip on the Weveshare board.

Within Quartus, click on the File Menu and select "Convert Programming files". The dialog box below will popup.
From the dropdown box on the "Programming File Type"  select a .jic file type.
This is the file format that is required to program the onboard serial Flash RAM.
For the Options/Boot info select EPCS16. Leave Active Serial as is.
You can name the .jic output file anything you like. I usually just leave it output_file.jic.
Note it will be in the Quartus generated "output_files" folder within your work directory.

Next click on Flash loader within the lower "Input Files to Convert", then click on the highlighted "Add Device" button.
You will get a popup dialog box as shown below.
Select Cyclone IV  and EP4CE10.  Note Quartus takes some time to allow you to actually select these options -- seems to be doing things in the background!
Next click on "SOF Data" and "Add File".  You should see your "normal" FPGA program .sof file in your "output_files" folder within your work directory.
Finally click the "Generate" button.
You should get a popup dialog saying "Generated output_file.jic successfully.
Note the name and location of the converted file. Then close that dialog box.  See the pictures below.
  
                      
    Programming 1     Programming 2
 
Programming 3 Programming 4
   
Programming 5
     
Next we need to actually flash the Waveshare boards RAM chip.
Click on the normal "Program Device (Open Programmer)" you normally use. If its not already open,  give it time to come up as a dialog box.
Make sure your board has power.  To be safe click the Auto Detect button. your normal xxx.sof file should display with the device set as EP4CE10F17.

First delete the "FPGA_DS.sof  |  EP4CE10F17...."  line etc.
Click on Add File and select the xxx.jic file you just generated above.
Click on the Program/Configure little square character boxes.
The chip diagram below should show only 2 chips as shown. If more, right click on any 'extra' one and delete it. The dialog box must look as shown below.
The Start button should highlight.
Click on this and you will flash the RAM chip.  Follow the Progress bar until it is done -- it takes about 1 minute.
You can power off and re-power your computer.
Your FPGA board should (after reset), start with whatever FPGA code is within the chip.
  
Programming 8
 
Note when you close the above dialog box, normally you do NOT save the changes.
Typically you want the chip to be quickly reprogrammable for testing etc.

NOTES
Remember there are two Z80 programs here.  The "SUPER_IO.Z80" program that is used to run the Z80 within the FPGA.  (The Submit file XXX.SUB makes this file within Altair.com)
The "SIO_DIAG.ASM" program that is used to test the board in the S100 bus.  (The Submit file YYY.SUB makes this file within Altair.com)

To Order a Production S-100 Board
Realizing that a number of people might want to utilize a board like this together with a group of people on the  Google Groups S100Computers Forum, a "group purchases" was formed. It is now closed. 
Please see here for more information.  Please do not contact me directly.

Please note some of the above pictures of the boards during the build process are late stage prototypes. The position of certain items may be slightly changed from the final (V1.1) version.

 

 


The links below will contain the most recent schematic of the above boards.
Note, it may change over time and some IC part or pin numbers may not correlate exactly with the text in the article above.

Super IO Board Schematic (V1.1) FINAL                                  .PDF File  (5/30/2022)
KiCAD files for Super IO Board (V1.1) FINAL                            .ZIP File   5/30/2022)
Gerber files for Super IO Board (V1.1) FINAL                           .ZIP File   (5/30/2022)

Super IO Board Chip layout                                                    .PDF File  (5/30/2022)
Super IO Board BOM                                                             .CSV File  (5/30/2022)

SIO_DIAG.ASM                                                                      Text File (07/03/2022)
SUPER_IO.Z80                                                                       Test File  (05/28/2022)
SIO_DIAG.zip                                                                        .ZIP File  (07/03/2022)
SUPER_IO.ZIP                                                                       .ZIP File (05/28/2022)
 
Super IO Board Quartus Files                                                  .ZIP File  (05/28/2022)
ADAFRUIT FX Demo Files.zip                                                  .ZIP File  (05/28/2022)
DFP MP3 Demo Files.zip                                                         .ZIP File  (05/28/2022)
DFP_Player.ZIP                                                                     .ZIP File  (05/28/2022)
DFP_PLAYER2 .ZIP                                                                .ZIP File  (05/28/2022)
ESP8266 WiFi.ZIP                                                                  .ZIP File  (05/28/2022)
PuTTY.ZIP                                                                            .ZIP File  (05/28/2022)
               



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This page was last modified on 10/14/2023