This was a multiprocessing slave board with a 4 or 6MHZ Z80 CPU. The
board (a bus slave) was completely self contained just using the bus for
power and to communicate with the bus master via I/O ports.
The SBC-1 was a single board computer designed to be implemented in a
high-performance multiprocessor system. The SBC-I allowed the systems
integrator to provide each user with his/her own CPU, 128k of segmented
memory, two serial ports, and two parallel ports. Because each user had his
own CPU, the addition of other users to the system caused far less speed
degradation than was currently available with "time-sharing"
The SBC-I used the high powered Z-80A or Z-80B CPU from Zilog. CPU speed on
board the SBC-I was independent of the S-100 bus system clock; therefore,
the ability to run a 4MHz SBC-I in a 6MHz S-100 system allowed the systems
integrator to optimize the efficiency and the cost effectiveness of his
Each SBC-I had 128k of RAM on board which incorporated a memory management
circuit that allowed virtual memory operation. The circuit partitioned the
RAM into 4k segments that could be dynamically addressed on any 4k boundary
of the CPU address space. This allowed ultimate flexibility in the
implementation of operating systems and applications software.
In addition to RAM. there was 2k, 4k, or 8k of EPROM available for
initialization routines. After the routines have been completed, the EPROM
could be disabled by software.
An option was available that allowed the use of the extra memory provided on
SBC-I as a local disk drive. Because this local drive was in reality a bank
of semiconductor RAM, it was many times faster than the system floppy disk
drives. This RAM drive was called the "M" drive and it could be used like
any other CP/M supported drive unit. Files could be loaded on the M drive
using the CP/M PIP command. There is a total storage unfortunately was only
59k bytes !
A Zilog SIO provided two independent serial ports with software selectable
speeds. A Zilog CTC provided the clock signals to the SIO. There also were
two additional counter/timer outputs available to the user at his option.
Both serial ports provided RS-232C interface capability for easy local
interconnection at speeds up to 19,200 baud. The baud-rate clock is supplied
by a 2,4576MHz oscillator. In addition, there were provisions for allowing a
synchronous MODEM to connect to one serial port.
A Zilog PIO provided two parallel ports for use in interfacing parallel
devices. One port was bidirectional and the other provides control lines
(some of which are used internally).
An adaptor board was available that converted the parallel ports to an
RS-422 compatible interface. The RS-422 port provided high speed (up to 154k
baud) long distance (4,000 feet) communications ability.
FIFO/S-100 BUS INTERFACE
The bus interface was fully IEEE-696 S-100 compatible. The SBC-I appeared as
a slave on the S-100 bus and communication to the system is via a
1k byte or 2k byte FIFO interface. Therefore, the SBC-I appeared in the
system as a set of I/O ports.
There are three levels of reset capability in the system utilizing the
The first was the traditional hardware system reset in which all components
of the system are reset.
The second level of reset ability was when the user resets only his SBC-I
leaving other slaves and the bus master undisturbed.
The third level of reset was an individual software reset available for each
SBC-I on the bus. This allowed the bus master to reset any one SBC-I without
affecting other users.
The capability of the SBC-I was not limited to the S-100 bus. With
appropriate interfacing the SBC-I could operated as a stand-alone network
user node. Communications to other network nodes could be implemented on
RS-232, RS-422, or through the FIFO interface.
The brochure for this board can be obtained
manual for the board can be obtained
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