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Teletek  -  SBC 86/87
This board was the 8086 step-up of their SCB-1 slave Z80 SBC.

SCB 86-87

The philosophy behind the design of the Teletek SBC 86/87 was to offer a product to the OEM/system integrator, or end user, a degree of feature flexibility not previously available on board level products. This flexibility allowed Teletek the freedom to custom configure a board, prior to shipment, that would most closely meet the specific needs of the system being designed. This approach to board design offered the most cost effective means of system integration. Only those features that were required would be provided on the board, reducing the number of unneeded options, thus lowering cost.
 
The SBC 86/87 was a 16-bit slave single board computer intended for use with the Teletek multiprocessing board family. With appropriate software drivers, the SBC 86/87 would run in any Z80 or 8086 based system that conformed with the S-100/IEEE-696 standard. The addition of this slave to any of Teletek's Z80 based master boards allowed the user to run most popular CP/M-86 and MS-DOS application software in a TurboDOS environment.

CPU
The SBC 86/87 used the Intel 8086 16-bit CPU running at 5MHz in its standard configuration. An 8MHz option was also available. The 8086 CPU provided a full 16 bit data bus to memory allowing up to twice the performance of similar CPUs with 8-bit data buses, i.e. the 8088. An Intel 8259 programmable interrupt controller provided eight priority levels, thus optimizing peripheral I/O communications. By reducing the CPU's involvement in polling routines, overhead was substantially reduced, freeing the CPU for more complex functions.

NPX
In addition to an already powerful CPU, the SBC 86/87 provided the option of adding the high performance Intel 8087 numeric data
coprocessor. This coprocessor added arithmetic, trigonometric, exponential, and logarithmic instructions to the standard 8086 instruction set. The 8087 provided up to 100 times the performance of the CPU alone during numeric intensive operations. In addition, the 8087 coprocessor conforms to the proposed IEEE Floating Point Standard.

Memory
128Kbytes of dynamic RAM with parity was provided standard with the option to expand it to 512Kbytes using 256K RAM chips. In addition to RAM, up to 64Kbytes of EPROM could be installed offering increased system flexibility. 4Kbytes of EPROM were provided standard. The parity checking circuit could be enabled or disabled under software control and triggered a non­maskable interrupt to the CPU if a parity error was ever detected.

I/O
Two RS-232 compatible serial ports and one Centronics compatible parallel printer port were provided on the SBC 86/87. The Intel 8256 MUART and Signetics 2651 USART provided all of the on board peripheral I/O. The MUART contained one asynchronous serial interface with internal baud rate generator, five 8-bit programmable counter/timers (four can be cascaded to two 16-bit counter/timers), two 8-bit programmable parallel ports, and an eight level priority interrupt controller. The two parallel ports were configured to provide a Centronics compatible interface. The USART contained one more serial interface with internal baud rate generator allowing both syn­chronous and asynchronous communications.

S-100 Interface
Communications between the SBC 86/87 and the S-100 bus master take place through two FIFO buffers, status bits, and interrupt signaling. Dual independent FIFO buffers, one for sending data and another for receiving data, allow simultaneous transfers into and out of the SBC 86/87 slave. Dual FIFOs also eliminate the problems of synchronizing multiple processors, dramatically reducing protocol overhead for both the slave and the master. The combination of master to slave interrupt signaling and dual FIFO buffers gave the SBC 86/87 the fastest, most efficient slave/master interface then available. The SBC 86/87 appeared as an I/O mapped slave on the S-100 bus and may be independently addressed via user-selectable jumpers.

Software
Teletek supported the SBC 86/87 with the TurboDOS operating system. TurboDOS provided the SBC 86/87 user with a CP/M-86-compatibie operating system environment, allowing any CP/M-86 application program to be run. TurboDOS 1.4 provided a PC-DOS (MS-DOS) emulator that allowed PC-DOS application programs to run in the multi-user TurboDOS environment. Additionally, TurboDOS allowed mixing of Teletek's 8-bit slave boards, the SBC-I and SBC-II, with their new 16-bit SBC 86/87 in any combination. This software feature allowed new systems to be tailored to a specific processing requirement, or permited the upgrading of existing systems from 8-bit to 16-bit gradually over time.
 
The Brochure for this board can be obtained here.  The schematic can be obtained here.
There was a hardware review of the board in the S-100 Journal (vol1,#2,1985). It can be seen here.
The manual for this board can be obtained here.

 

Other Teletek  S-100 Boards
Systemaster    Systemaster-II    SBC-I    SBC 86/87    HDC    FDC-II     FDC    64KRAM  

 

This page was last modified on 10/25/2013