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The board utilized high speed DMA for data transfer. For slower CPU's one wait state could be inserted in the DMA cycle. It had an elaborate vector interrupt system and could work with 8 or 16 bit I/O addressing. The whole system looks nice and logical but unfortunatly I have no information about the hard disk controller cards themselves.
The manual for this board can be obtained here.Other InterSystems S-100 Boards
This page was last modified on 10/25/2013