Hi!
Now here is the really weird thing…
Before I installed the extra RAM the PC was thrashing like crazy and had used up all 2GB of physical memory and most of its 6GB swap file. The PC drive was going bananas swapping in and out virtual memory so I knew it had to be affecting performance.
Now I check the PC and with both trace route jobs running just like before the *total* system RAM used is less than 1GB with no swap file used at all. The drive is completely silent and the jobs are humming along as quickly as ever.
I am wondering if the VM subsystem was chewing up all the physical memory and it was running the jobs out of virtual memory. That would explain the awful performance to date!
Thanks and have a nice day!
Andrew Lynch
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Andrew Lynch
Sent: Monday, December 26, 2011 11:50 AM
To: n8vem...@googlegroups.com
Cc: 'Pontus Oldberg'
Subject: RE: [N8VEM-S100:578] S-100 68K CPU board status
Good news on the S-100 68K CPU board third prototype. I was in the basement looking at the PCB in trace route optimization and noticed there is a lot of disk thrashing going on. Using some spare memory I doubled the memory from 2GB to 4GB and restarted the optimizer. It started without a hitch and is now running silently with almost no disk activity.
Now the real test will come in several days of running when the Java trash collection has been running. With some luck we’ll see more efficient CPU processing of the boards and less time wasted thrashing the disk for virtual memory.
Thanks and have a nice day!
Andrew Lynch
Hi John! Thanks!
The Teeside assembler is PC based (MSDOS) so you can cross-assemble
There is some CP/M 68K system documentation here
http://www.retroarchive.org/docs/software/cpm68.html
Unfortunately there does not appear to be CP/M 68K System Alteration Guide AFAIK
Without a sample CBIOS though creating one from scratch using an assembler sounds difficult and time consuming.
Maybe Pontus can help us break out of this “catch-22”
Thanks and have a nice day!
Andrew Lynch
Thanks Andrew. Saw the “CPM68K Source code” however that code is in C and as best I can tell needs an running 68K system to put it together. I suppose we could look for a cross compiler, linker etc. setup but those kind of things quickly unravel. I was hoping for a CPM86 like image setup where one just gets a BIOS shaped up and somehow “splices” it into a CPM68K image.
Enlarging the basic monitor I wrote (or even the much larger Motorola TUTOR code) to include sector read/writes is not hard/a problem, its splicing it on to a CPM68K OS core I’m trying to figure out.
John
Hi John! Pontus helped us with the initial S-100 68K CPU board. He ported TUTOR 1.3 and I think at least started some work on CP/M-68K.
There are disk images in the CPM-68K folder under the S-100 68K CPU board directory.
http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder¶m=S-100%2068K%20CPU
Also there is a CP/M-68K source code archive here
http://www.cpm.z80.de/source.html
CP/M-68K
NEW 08/17/2002 CP/M-68K 1.0x SOURCES : 4.46M A collection of C sources for CP/M-68K, apparently for versions 1.01, 1.02, 1.02a, and 1.03.
A comment I recently received reveals:
There are some BIOS/BDOS/CCP sources in here, but all seem to be revisions of version 1.1 of the OS.
The bulk of the code looks like revisions of Alcyon C (compiler, assembler, linker and libraries). As far as I can see, this compiler emits 68K assembler and should run under CP/M-68K, REGULUS, VMS on a VAX and Unix on a PDP-11.
Reading v101/doc/ and v102a/doc/ makes interesting trivia:
1. "The Pascal version of CP/M-68K..." (cpm0706.rno)
2. "Allows up to 8Gb of on-line disk(ette) storage" (pdd.rno)
3. "CP/M-68K Alpha Release III 2/15/84" (a3.rno)
CP/M-68K 1.2 SOURCE : 518K C source for CP/M-68K version 1.2.
NEW 08/17/2002 CP/M-68K 1.2 SOURCES : 719K CP/M-68K 1.2 from 03/20/1983 (C sources). Archive contains 12 disk images in RAW format (IMG).
NEW 08/17/2002 CP/M-68K programs : 157K Collection of programs and utilities for CP/M-68K (sources in C language).
Unfortunately we never made it this far with the S-100 68K CPU board. However since you have one working if you want to take on this project all the pieces are available.
Please let me know what I can do to help. Thanks and have a nice day!
Andrew Lynch
Thanks John for blazing the trail. I guess I will wait until you get your ECB board BIOS done and have “spliced it into a working generic CPM68K version”. I have not located the latter yet. I seem to remember Godbout had 8” disks for one on his FDC boards . Will start looking.
On the Z80 interrupts, I actually went with a simple 8 bit IC/Switch approach for the Z80 on the PIC-RTC board.
See here:-
http://s100computers.com/My%20System%20Pages/PIC&RTC%20Board/My%20PIC%20Board.htm
Mode 2 is real nice on the Z80 once you get it working. The 8259A works real nice on all the Intel/AMD chips but I agree for the Motorola family it’s far from optimum. The NS32202 (or AMD9519) are better more generalized choices for non-Intel CPU’s.
John
I pointed you at the BIOS docs first, since the S-100 system is quite a bit different from the ECB board suite. Compatibility at the BIOS level would simplify the implementation of CP/M-68, since 16-bit (S-100) CP/M is going to be the same as 8-bit (baby ECB) CP/M.
I would expect the underlying S-100 BIOS to be significantly different from the ECB M68k BIOS, since the underlying I/O hardware is totally different.
The SBC-188 BIOS project proceeded rather briskly, as we had the IBM PC BIOS interface as our target.
A single BIOS interface, perhaps using the baby M68K BIOS docs as a starting point, might allow the two projects to take advantage of one another.
I am only familiar with CP/M on the Z80, where the "BIOS" level is implemented by calls through a vector table. That is effectively what the baby M68k BIOS is doing. All function call numbers are purely arbitrary. INT #8 is used, because one CP/M-68 implementation uses INT #2 for CP/M calls. I don't know if INT #8 is a good choice or not. I'm open to alternate suggestions.
On 12/23/2011 06:44 PM, John Monahan wrote:
Thanks John. Unfortunately I am a little confused where to go from there.
I think I can write code to do console I/O and talk to the dual IDE board
(with CF cards) but how do I splice this BIOS into the generic CPM68K. Where
do you have that.
I have not begun to work on CP/M-68. This BIOS should have the basic console I/O calls, and disk I/O calls needed for any OS. CP/M is probably the easiest to get running; but I am open to other OS suggestions.
BTW could I run the system using an Intel 8259A is "read status mode" from a
single interrupt.
Working with the 8259A on a Z80, I totally gave up trying to vector interrupts in mode 2. That is why I moved to the NS32202 interrupt controller. On the MF/PIC board, with the "configuration register" this controller will cause the board to give interrupt responses compatible with the MC68000 family, Z80 (IM 2), and Z80 (IM 0). All 3 of these modes of operation have been tested.
As you know the 8259A in it's native Intel mode puts the
Int vector directly on the bus only after 3 INTA signals. However if we just
trigger one the 68K Int pins we can just read the 8259A status and get
appropriate S100 Int (1-7). Slower but at least generalized.
The NS32202 PIC with the MF/PIC board circuitry does this all in hardware. It can be programmed to use 8 sequential Trap Vectors on the 68000, starting at an appropriate address.
The NS32202 looks rather daunting to initialize. However, NS provides an initialization flowchart in the data sheet. That is why the initialization code, posted with the MF/PIC board docs, is specified in C. There are comments for the changes needed for the Z80.
The S-100 system may use a different PIC. The differences should be handled in the BIOS; the OS need never know what PIC is actually in use, if any. Auto-vectoring operation ought to be a good choice with the 68000 also.
--John
John
John Monahan Ph.D
mon...@vitasoft.org
-----Original Message-----
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On
Behalf Of John Coffman
Sent: Friday, December 23, 2011 4:44 PM
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:566] S-100 68K CPU board status
John,
Start at http://n8vem-sbc.pbworks.com/
Under the tab "Pages & Files", folders to traverse are:
1 Board Information
2 ECB Processor Boards
3 ECB Baby 68000
direct link board description:
http://n8vem-sbc.pbworks.com/w/file/48863865/baby%20M68K%20descr.txt
4 BIOS ROM images
direct link BIOS docs:
http://n8vem-sbc.pbworks.com/w/file/48864762/BIOS_doc.zip
Bios 8 is the latest posted.
--John
On 12/23/2011 02:10 PM, John Monahan wrote:
John could you direct me to the most relevant URL for the ECB baby
M86K Thanks John
John Monahan Ph.D
mon...@vitasoft.org
-----Original Message-----
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com]
On Behalf Of John Coffman
Sent: Friday, December 23, 2011 12:04 PM
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:564] S-100 68K CPU board status
John,
The ECB baby M68k approach has been to write a BIOS that can load from
CF card. The next round of the BIOS will have Floppy support (1.2Mb,
720Kb, 1.44Mb).
I haven't tackled CP/M-68 yet; but I don't see it as very difficult to
support above the BIOS level.
Ultimately I'd like to see real CP/M diskettes supported: 128
bytes/sector FM mode.
--John
On 12/23/2011 09:38 AM, John Monahan wrote:
Hi Guy's, While waiting for a few components to arrive for the S-100
VGA prototype board (very slow here this time of the year, very
frustrating), I have been browsing the web looking for the easiest
way in software to get CPM68K running with our 68K board, ZFDC board etc.
Has anybody done this in the classical way, i.e. write a BIOS is
assembler link it in with DR's code, place it on a 8" disk and get
going from there. Most of what I see is in C code and/or requires a
CPM68K OS already running to get going.
John
John Monahan Ph.D
mon...@vitasoft.org
-----Original Message-----
From: n8vem...@googlegroups.com
[mailto:n8vem...@googlegroups.com]
On Behalf Of Andrew Lynch
Sent: Friday, December 23, 2011 7:00 AM
To: n8vem...@googlegroups.com
Subject: [N8VEM-S100:562] S-100 68K CPU board status
Hi Mike! We made some changes to the third prototype to add the TMI
circuitry and remove some of the redundant debugging hardware.
You'll notice the board is using the DIP-64 version of the CPU so it
is back to closer to your MMU design.
The PCB is taking forever to clean up the trace routing although
recently it is showing signs of improvement. Slowly though...
Please keep up with the MMU design because there is going to be an
S-100 68K CPU board eventually!
Thanks and have a nice day!
Andrew Lynch
[snip]
PS. Sorry I've been slacking on the 68K work, guys, I've been just up
to my neck, it's getting closer to the front burner however.
Mike Sharkey
http://8bit.zapto.org