Very good catch David! Never knew this.
From: David Fry [mailto:dgf...@googlemail.com
Sent: Saturday, January 17, 2015 11:51 AM
Cc: rich...@gmail.com; mon...@vitasoft.org
Subject: Re: [N8VEM-S100:6035] Dual IDE/CF V2a
Something has just made me search online and pull the datasheet for the 82C55,
John mentioned that he uses on all 3 boards the OKI82C55A-2 or the NEC82C55AC-2
I use a Mitsubishi M5MB82C55AP-5, so what's the difference between the -2 and the -5 versions, maybe a little more
than you think, check out page 20,21 and 22 of the OKI datasheet attached regarding port 'B' instability.
Is this a problem for all manufacturers of -5 versions ? Who knows...
Just another thing to check out
On Saturday, January 17, 2015 at 7:00:19 PM UTC, monahanz wrote:
Rich I just pulled my 3 working cards. They have been there for now years!
I have a Signetics 7403A in one, one labeled S7403N, and the third is a Ti 74LS03. The first two chips are from 1973, cannot figure out the date of the Ti chip. . Interestingly RR1 in the first two cases is a 1K resistor SIL, the Ti74LS03 chip has a 680 SIL.
Two of the 8255s are OKI82C55A-2 the other is a NEC82C55AC-2. I generally use Kingston 4GB CF cards (white flower picture on it) but also use Maxell 4GB and Patriot 4GB cards are also 100% reliable.
One board is in a 10 slot motherboard, one a Compupro 18 slot motherboard , the other (my main system) is in a 21 slot motherboard. The 10 & 21 slot buses have active termination. The “normal” CPU is our Z80 V2 board running at 10MHz (1 RAM wait state, 2 IO wait states, 1 ROM wait state). However no problems with any of the 8086 family of CPU’s. David was testing the 68K and had some issue I seem to remember above 6MHz but I think that was the 68K CPU boards “fault”.
Not sure this helps. But you might want to search around for an old 7403.
At one time I was thinking of doing another version of the board perhaps using a SD card as well, but frankly this one seemed to work so well it fell to the bottom of the priority list.
It is the most recent release. Silkscreen says 02a.
On Friday, January 16, 2015 at 11:43:00 PM UTC-7, monahanz wrote:
Rich are you referring to the V1 or later V3 Dual IDE/CF board. On the web page
I used Open Collectors 7403’s with 680 Ohm pull-ups for the Read, Write and Reset signals on the V3 board. Seems to work fine for me. Been using them, (2 boards), for 2 years now.
From: n8ve...@googlegroups.com [mailto:n8vem...@googlegroups.
com] On Behalf Of Rich Leary
Sent: Friday, January 16, 2015 9:15 PM
Subject: Re: [N8VEM-S100:6035] Dual IDE/CF V2a
It is puzzling. I am using all 74LS except the two 74S03s and have tried both NMOS and CMOS varieties of the 8255.
I have gone back to the CF and IDE specs and looked hard at the signal level specifications. My preliminary look seems to conflict with the build notes.
The CF spec defines three type of signals at the interface and one of them (Type 1) does specify a 4V Vih for some signals. Other signals use either 2.0V or 2.8V.
What is confusing is that the Type 1 signals are the address lines (An) and the data lines (Dn). The IORD, IOWR, and CSn (chip select n) lines are all Type 3 and the card inputs for those lines only require Vih of 2.8V to trigger the Schmitt Trigger that Type 3 uses. But the IORD, IOWR, and CSn lines are what are driven by the 74S03 or 74H03 ICs on the S100 board. RESET is a Type 2 signal and Vih need only be 2.0V.
The only on-board pull ups are those associated with the 74S03 or 74H03 ICs and they are very low value. The schematic shows 680 ohm but the notes suggest something like 330.
What is also important to note is that the CF card input leakage current is very low at +- 1 uA so whatever is driving all CF lines is doing so at a very low load level. Since the IDE An and IDE Dn lines all connected to the 8255 ports that probably explains why those lines may be OK. In my Toshiba TMP82C55A datasheet it shows a Voh of Vcc-0.8V for Ioh of -100uA. As long as the load seen by the 8255 is just one of two CF cards with a total leakage of +- 2 uA that would work. But any 8255 outputs driving TTL inputs may have a low or marginal Voh at least for Dn and An.
I can see no reasons for use of the high power - high speed gates and the low value pull ups on the IORD, IOWR, CSn, and RESET lines. As I read the specs it looks like those gates can be 74LS00's with no pull up or much higher pull ups (50K ?). In addition if we do not need to switch the higher currents associated with the low value pull ups that will reduce noise levels on the board.
I need to read the CF spec again and do a line by line gozinta versus gozouta analysis before reaching for the de-soldering braid and solder sucker. It is possible that I have completely misread the spec and if so I apologize for the confusion but right now I think there may be some low-hanging fruit that should be harvested. Even if what my initial look indicates proves correct there may be other issues.
I will get back to everyone hopefully by late on the 18th.
If anyone has reason to show me the error in my thinking please fire away - at my age my skin has absorbed many blasts and a little more will not hurt.
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