RE: [N8VEM-S100:1670] IMSAI 8080 CPU card replacement

The Z80 presents a problem when trying to interface to the IMSAI Front Panel. There are a few signal lines that are needed which are only simulated by fancy circuitry to convert a Z80A to an 8080A. It can be done (and has been done) on many other Z80 CPU cards, but my intent was to keep it simple and use the original CPU that inspired the creation of the ALTAIR and IMSAI.

If there is a need for a Z80, perhaps (at a later date) we can build a replica of the Dutronics 280-80 piggy back board? This board uses 12 or 14 extra chips to simulate an 8080 CPU.

Date: Tue, 14 May 2013 12:59:34 -0700
Subject: Re: [N8VEM-S100:1670] IMSAI 8080 CPU card replacement
From: laf...@lafleur.us
To: n8vem...@googlegroups.com

I agree, we need a simple board...

my two bits....

An SBC would be great

one serial ports is fine, option for a 2nd is nice

an SD card is very nice to boot from

64k or ram min

front panel connector for Altair and imsi system a must

boot rom option??, be able to disable it... not sure why we may need this with PIC doing the boot??

Options:

Z80 would be nice, speed has to work with front panel on older systems like Altair and Imsi

connection to the full S100 bus would be nice, but it need to be simple...

option to be able to use more that 64K of memory, ie : a 2nd 128x8 chip on board with simple MMU??

On Tue, May 14, 2013 at 12:28 PM, Jack Rubin <j...@ckrubin.us> wrote:

I think a lot of us would like the SBC that Josh described originally. I’ve got several front panel machines that I want to run in display mode using TEI short chassis boxes. Think front panel, SBC board and 6 slot motherboard. 8080 CPU preferred.

The key to this is the proper front slot offset. For boards using the IMSAI style chassis, the space between slots 1 and 2 is 1” and the spacing between all subsequent slots is ¾” (not sure if I’ve remembered the exact measurements correctly but there is definitely a difference between the first two and all others). The N8VEM backplane might work if you give up slot two but card slide spacing will be off. Anyhow, that’s my rationale for a true SBC.

I’d still be interested in the ‘SMB-III’ you describe below but it is a very different animal with a different purpose.

Best,

Jack

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of John Monahan
Sent: Tuesday, May 14, 2013 11:11 AM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1668] IMSAI 8080 CPU card replacement

Thanks for all the detail below Josh. That explains a lot. Seeing what you have there for a very specific indication/need it all makes sense.

That said, I’m now thinking that what might make more sense for a broader audience is a more general “All in one” (SBC) Z80 driven S-100 bus board that would be a debugging board for a first board system. However the whole thing could quickly spin out of control with complexity fast. How self-contained is the PIC/Flash card circuit. What is the minimum requirement to drop code at 80H upwards.

Alternatively I thinking about a far better SMB-II (http://www.s100computers.com/My%20System%20Pages/SMB%20Board/S100%20Bus%20SMB.htm) that has more diagnostic/control capabilities and could be used in a two card S-100 system with most CPU boards.

John

John Monahan Ph.D

e-mail: mon...@vitasoft.org

Text:    mon...@txt.att.net

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Crusty OMO
Sent: Tuesday, May 14, 2013 7:14 AM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1665] IMSAI 8080 CPU card replacement

Hi John,

Thanks for looking at the schematics. I was trying to explain earlier that this board still needs more care to bring it up to a full S-100 card. I built it as fast as possible to serve as a SBC (Single Board Computer) that would allow the IMSAI front panel to work. I only paid specific attention to signal lines that the CPA (Front Panel) card requires.

I also chose to build this board around the original 8080A CPU because it makes running the Front Panel much simpler and is the original CPU of the IMSAI and ALTAIR. You mentioned how the Z80 can be worked to run the S-100 bus, and it's been done before in many ways. I built this board for the IMSAI, not for speed. Also, since this board was built as a CPU replacement for the IMSAI at my local PC Museum, I wanted to say that the IMSAI was being run by an original 8080A cpu.

On my prototype board, I didn't bother to connect the Data bus to the S-100 bus because it was intended to be a single board computer. I only connected DO5, because it is required by the IMSAI front panel to stop (Wait mode) the 8080A CPU. Of course, DO5 is driven by a 74LS244. This board requires a little steering logic to engage the S-100 Data In bus. As-is, the SBC would never need to get data from the S-100 bus, but when the Phantom line or the RAM block disable features are added, then Data-In will need to be engaged (through a 74LS244) for external card reads.

Re Wait states.
The 7474 chip is clocked on to engage wait state when ever a pINP, pOUT occurs or when a pMEMR AND the BOOT flip flop is set. The PIC is triggered by the 7474, and responds according to pDBIN, sOUT, A0,A1,A2 and the condition of the BOOT flip flop.
If in BOOT mode, the PIC outputs the next instruction byte to spoon feed the 8080A.
Else, If pDBIN is set, the PIC outputs the I/O byte addressed by A0,A1,A2 (could be UART or Floppy Disk)
if sOUT is set, the PIC accepts the I/O byte addressed by A0, A1, A2.
At the end of any PIC Read or Write cycle, the PIC resets the 7474 thus releasing the 8080A from the Wait State.

It is not clear on the schematic how pMEMR, pINP and pOUT are generated. I labeled those lines sMEMR, sINP and sOUT but that isn't correct since these signals happen at the start of STSTB signal which is a whole phase 1 clock width before the sMEMR, sINP and sOUT. I couldn't use sMEMR, sINP and sOUT to trigger a wait state, they occur too late in the cycle. Drove me nuts when I tried to on my first design cycle!

A 74LS165 and 8 position switch is fine for providing a fixed wait state of N cycles depending on the switch setting. The Wait state entered here is to allow the PIC chip all the time it needs to fetch/set the UART and/or data to the Flash Memory (emulating a floppy disk). The PIC can hold the 8080A in a WAIT state for as long as it takes to write sectors to the FLASH, etc. A PIC was used here to minimize chip count on the board.

2Mhz can be obtained from the 8224 chip (like in the original IMSAI CPU card).

SDSB*, DOSB*, CDSB*, and the Address bus disable lines just need to be connected to the 74LS244 Hi-Z control. I skipped this on my prototype because it wasn't needed for a SBC, but that's no big deal to fix.

:)Josh

From: mon...@vitasoft.org
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1661] IMSAI 8080 CPU card replacement
Date: Mon, 13 May 2013 11:00:32 -0700

Josh I just started to look at the 8080 board schematic in detail. Sorry about the late arrival on this.

How are the separate S100 bus data in and data out lines being driven. On the right hand side in middle of the page you have labels DI4..DO3. If these are connected directly to the 8080 D0 –D7 this would create a problem in any system that has other cards. Not only is the drive capability of the 8080 limited but there would be DMA issues, noise issues, and forget any master/slave CPU handover capability. There has to be separate data in/out bus drivers. I’m also not clear how wait stares are being done. Is the PIC programming to output separate/different bits for SMEMR, SINP, SOUT etc. A single 74LS165 and 8 position switch may be simpler. But I may be overlooking something you are doing.

We need a separate 2MHz clock for pin 49 (old URAT boards use this signal) . All status, control, address and data lines (both directions) need drivers that can be disabled with SDSB*, DOSB*,CDSB* etc. You have some of the drivers, it’s just you have the enable pins grounded. As It stands this board would almost have to be the only board in the bus. It may work with some of the every early Altair boards, but I think it would be fairly limited. Already mentioned need for address lines up to A20.

Guys before we go any further this may be a good time to think out what we want to accomplish.

If we want to have a “one board system” to play with for CPM 1.4 on a Flash card in an Altair like box with a front panel etc. we can of course do this.

Here are my concerns. I don’t think it will work with many later S-100 boards, and probably not with most, if not all, of the new IEEE-696 style S100 boards we have done in the past few years or those out there on eBay etc..

The neat part of the board is Joshes’ PIC boot and Flash card combination along with a simple UART I/O interface. I think that is really great.

My concerns is not only the hardware issues above but there is a lot of software out there that utilizes Z80 opcodes. Primarily block moves and bit testing. The hassle of redoing them for say the IDE/CF card board, ZFDC floppy disk controller board, video boards etc is going to be time consuming. Not rocket science, but a pain. I don’t really know how many CPM software programs themselves need Z80’s

Here is a suggestion. We switch to a Z80/RAM/ROM core. It’s a three chip set (already used in the ZFDC board).    The only “hairy” part is hammering some of its control signals into 8080/S100 bus shape.   We did it (with much overkill) on the Z80 CPU board.

The end goal would be to have a single self-contained S-100 bus Z80 board that would allow users to boot strap up CPM 1.4 as josh did here, and later add other S-100 boards. With the long term goal of actually replacing that board with a much more elaborate multi-CPU board system.

Please understand I am not trying to force a vision on others as to which way we go. Make no mistake all these boards take time and effort, Andrew and I have 5 or 6 currently in the pipeline, if we take on this one as well we need to be clear where we are heading with it.

Comments please.

John

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Tom Lafleur
Sent: Monday, May 13, 2013 6:45 AM
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:1658] IMSAI 8080 CPU card replacement

New specs look good...

TPA: The read/write memory between address 0100 hexadecimal and the lowest address of the BDOS was the transient program area (TPA) available for CP/M application programs, ie: all of ram, except BIOS

On Mon, May 13, 2013 at 6:39 AM, Crusty OMO <crus...@hotmail.com> wrote:

What is TPA?

Ok, this is the list of features/changes,
-full 64K, a single 32pin 128Kx8 will save a lot of board real estate.
-Phantom line to "create holes" by external cards
-Jumper blocks of memory for external S-100 bus mapping.
-Optional ROM.
-An extra UART for a 2nd serial port.
-Sockets for both the IMSAI and ALTAIR front panels

:)J

Subject: Re: [N8VEM-S100:1655] IMSAI 8080 CPU card replacement
From: laf...@lafleur.us
Date: Sun, 12 May 2013 18:08:41 -0700
To: n8vem...@googlegroups.com

With the board the way it is. You can run CPM with just one card with full TPA. This is good.!!!! N

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On May 12, 2013, at 5:28 PM, Crusty OMO <crus...@hotmail.com> wrote:

Ok, makes sense. I think using only 32K of RAM would be a simpler design. No jumpers to disable the on board RAM in blocks.
It is nice to be able to address other boards on the S-100 bus, perhaps someone has video cards they would like to run?

Having a full 64K means we need jumpers if we are to add some flexibility. If we keep it as-is, then you can never access memory on the S-100 bus, since all the memory is on the single board (which is fine for my application at the museum but not so cool for others who might like to access other cards).

:)J

Date: Sun, 12 May 2013 10:01:30 -0700
Subject: Re: [N8VEM-S100:1651] IMSAI 8080 CPU card replacement
From: laf...@lafleur.us
To: n8vem...@googlegroups.com

keep as much RAM as you can, 128Kx8 are just fine, its ok to not use it all....

keep it simple, do not over design it!

On Sun, May 12, 2013 at 9:54 AM, John Monahan <mon...@vitasoft.org> wrote:

Josh since there is plenty of room on the board I would keep the 64K. In fact since they are so cheap these days I would use one chip. There are no common 64X8 statics but plenty of 128x8’s static RAMS. Either waste the upper half or use banking. I have not analyzed the board thoroughly but how are you doing the ROM/Monitor. Is the PIC acting as a ROM. We could easily add a 4K ROM in place of the one of 2 RAM slots.

John

John Monahan Ph.D
e-mail: mon...@vitasoft.org
Text:    mon...@txt.att.net

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Crusty OMO
Sent: Sunday, May 12, 2013 9:41 AM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1649] IMSAI 8080 CPU card replacement

John, I agree, the changes to bring it up to S-100 standards will be minor.

Currently, the board works stand alone. It would be nice if people could use other S-100 cards with it, eg. RAM cards to test, Video card, etc.

To keep it simple, I think we can just remove the upper 32K of RAM, CP/M runs fine in the lower 32K. The only reason I did the full 64K was because I needed to cache 4K sectors from the FLASH chip and I used 4K of the 8080A address space to do it. I would really like to go back and do this caching within the PIC address space. I just didn't have the time on my first dead line to add extra memory to the PIC. Perhaps there's another PIC chip that has 4K of RAM on the chip? I bet there is.

:)J

From: mon...@vitasoft.org
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1648] IMSAI 8080 CPU card replacement
Date: Sat, 11 May 2013 20:02:43 -0700

Josh if we can persuade Andrew to do a schematic layout. I will hammer it into IEEE-696 shape. Don’t worry Tom the additions would be fairly minor. Just want it to be able to work with our current boards

John

John Monahan Ph.D
e-mail: mon...@vitasoft.org
Text:    mon...@txt.att.net

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Crusty OMO
Sent: Saturday, May 11, 2013 6:55 PM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1646] IMSAI 8080 CPU card replacement

Hi John,

My design definitely requires refinement to make it IEEE696 compliant. It started off as a single board replacement, but if we are going to make it into a nice board, it needs more attention to the S-100 details. I'm neck deep in my next project at the moment (building a Floppy Disk reader at the read pulse level). But when I can get my prototype back in my hands, I'll continue this design (and add the Altair connector).

I should be getting my Alair in a couple of weeks, so I'll shelve this project until then. If anyone has time to work on it, then I'd love to get more advise.

PS. How should Phantom work? Does it just override the Chip Select of the RAM?

PPS. I have the book "Interfacing to S-100 / IEE696 microcomputers" by Sol Libes and Mark Garetz. Very good book, feel free to reference any pages in it.

:)J

From: mon...@vitasoft.org
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1645] IMSAI 8080 CPU card replacement
Date: Fri, 10 May 2013 21:14:43 -0700

Absolutly minimally Josh the IEEE-696 upper address lines (A16-A20) need to be pulled to ground (via a 74LS244 or something). Take a look at the pin designations. See here:- http://s100computers.com/History.htm (bottom of page) for all the lines. Make sure Phantom like is working correctly. May want to pull to ground Data lines 7 to 15 for port I/O’s. These for starts.

John

John Monahan Ph.D
e-mail: mon...@vitasoft.org
Text:    mon...@txt.att.net

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Crusty OMO
Sent: Friday, May 10, 2013 4:29 PM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:1641] IMSAI 8080 CPU card replacement

John,

One more thing about this board...
As is, it runs great, but perhaps it could use a little more flexibility.

It has the full 64K (local on the same board), but I'm thinking perhaps it should have less or optionally allow some address space from the S-100 bus.
ie, jumper select blocks of address space that are to be gotten from the S-100 bus?

Comments?

:) Josh

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