Hi Andrew,
yes, you are correct we have a classic SR* NAND latch with U21.. sorry i must have been somewhere else while posing that, i have exactly the same setup, except the Q output from the latch (pin 3 in your example) im not inverting it going into U8 (in your example), im taking the Q output from the "RESET*" NAND.. this would save us an inverter.. ? not too important.. but hey.
yes U35 and U34 are redundant.. save us some precious board real estate :-)
with respect to U22B outputs, i see different configurations for ROM, RAM etc pages setups all across the numerous MSX manufacturers tech manuals for different requirements. i see you have U35C,D and U36A to add a page CS12* for use by cart slots, then with the 32k ROM you have used A15 and 1Y0*. and we have 32K RAM beside the 32K ROM, do we need the 32K RAM there in slot0 when we have 64K RAM in slot 2? the bios on startup is going to search for the largest chunk of memory anyways, and map RAM into the highest 16K address space via the 8255. one could always use a expansion mapping scheme with Slot2 or 3 to give us more than 64K RAM? i.e. to give us some flexability could we have the 64K RAM onboard and one could always use an expansion in a cart slot to add extra memory .. anyways back to what i was wanting to say.. could we use an 1/4 74LS08 connected to U22B pins 12 and 11 to give us a CS01* and connect this directly to our 32K ROM CE and OE (of the 32k ROM) connected to U22A pin 4 (SLOTSL0) or 1Y0* in the schematic. this way we could loose most of U23C,D and U15D.
im still yet to figure out exactly what the Z80 sees while running a cartridge, but i think is usually the lower 16K for BIOS (or maby 32K) the next (moving upwards) for the Cartridge, and the top 16K for RAM.
with respect to the 682's, yes is agree.
have we put any thought in the BIOS we are going to employ? anyone else have any thoughts on a BIOS?
Kind Regards,
Antony
On Monday, 5 August 2013 10:31:49 UTC+12, lynchaj wrote:
Hi
As you may already know, at the N8VEM project we are working on an S-100 VDP. This board has a V9939 video display processor and a AY-3-8910 sound generator which should allow us to have some MSX2 compatibility when combined with a backplane, S-100 Z80 CPU board, and a memory board.
There are more IO and memory features necessary for full MSX2 compatibility required though. I am considering a designing a board to provide the balance of MSX2 functions so that the combination of an S-100 backplane, S-100 Z80 CPU, and S-100 VDP.
I envision such a board to be composed of SRAM memory, a couple of 8255 PPIs, a card slot plus whatever extra IO and memory we need. If anyone has detailed MSX2 experience and would like to help out on designing an S-100 MSX2 compatibility board to complement the S-100 VDP please contact me.
S-100 and MSX seem like a neat combination but no one has tried it AFAIK. Thanks and have a nice day!
Andrew Lynch