A per CPM3 documentation, the common memory is high memory. So, my design will have one of these four possible configurations:
1. 32K bank & 32K common. Bank switched memory will be the lower 32K resulting in a memory map like this:
32K Common 32K Common
----------------- ---------------- … up to 8 banks available with the hardware MMU/Bank switch logic I am designing.
32K Bank 0 32K Bank 1
2. 40K bank & 24K common. The 40K will be bank-switched:
24K Common 24K Common
----------------- ---------------- … up to 8 banks.
40K Bank 0 40K Bank 1
3. 48K bank & 16K common. I this this will be the most efficient:
16K Common 16K Common
----------------- ---------------- … up to 8 banks.
48K Bank 0 48K Bank 1
4. 56K bank & 8K common.
8K Common 8K Common
----------------- ---------------- … up to 8 banks.
56K Bank 0 56K Bank 1
Since I don’t know which model will work best, I’m leaving myself room for flexibility.
I am currently writing the GAL logic equations.
I discovered last night that the 22V10 does not have enough product terms for this flexibility, and I had to move some of the logic to a second GAL. Oh well.
Once this is done I’ll get down to burning the GALs, then I can start wiring up a breadboard and testing.
I have two 64K memory boards right now that have extended memory addressing capability – they ought to suffice for testing.
Of course, this means bringing up a banked CPM3, and I don’t even have a non-banked CPM3 yet. So much cool stuff to do.
Years ago, I watched as Zilog developed the Z180 and the Z280. I even designed a board for one of them.
But they seemed to drag with the introduction, and by the time they were out, life had moved on.
Bob Bell
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com]
Sent: Saturday, March 21, 2015 11:26 PM
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:6632] Re: CPM3 memory banks
>> I recall several months ago, in response to some of my more preliminary questions
>> on this group regarding bank switching, someone suggesting the use of the 74LS670.
That was me! I've been thinking about ways to do this (with the 74LS670 and a 512 x 8 SRAM) since then. Came up with this design, and put it together on a plugboard. I was surprised that it was so easy to get working! And at 10 MHz no less. The compact flash seems to work great too.
>> I have the feeling that a 48K Bank / 16K Common would be more appropriate for
>> CPM3. In that respect, I am designing my MMU to have a selectable common size:
>> 32K, 24K, 16K and 8K. It will provide bank-select for up to eight banks.
Will the 32/24/16/8k pages appear anywhere in the address space, or at a fixed location?
I think I might go back to Francis Gormarker's original design (16k pages), because that will permit bank swapping in the middle of the Z80's address space. Much more convenient. Or, maybe, try some tricks with the Z180??? Who knows.
Roger
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