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Re: MSX2 Utility Board V1 Build info

There was a question over the last couple of days asking about the status of the MSX2 Utility board so here is an update.

The board design requires a few fixes; I have a Word document that describes my changes in detail (attached to this post).

IORQ* and MREQ* are not being generated. The NAND gates (U5D and U21D) will be replaced with NOR gates. There are two spares (U34A and U34D) that can be used.
Power on RESET on the board is flakey; my fix hasn't totally fixed the issue.

The on-board EPROM is hard wired to start at address space 0x0000 - this is identical to the MSX2 design.
   This created issues for me as I had to disable to on-board EPROM / Jump to Address circuits on my Z-80 V1 CPU Card; this required a fair amount of modifications to accomplish.
   The V2 CPU card has a jumper to disable the on board EPROM; I need to test the V2 CPU with the MSX2 board.

I've tested the MSX2 Serial Port and EPROM; both work as expected.
   In order to use the MSX2 EPROM you need to disable RAM in the address space the EPROM occupies; how you do this is dependent on the RAM card(s) in your system,

So far the MSX2 on-board RAM isn't working as I would expect.
The MSX2 expansion slots are untested.

I have a simple monitor written that runs on the MSX2 card using the on-board Serial Port.

There's a lot of work left to get the design completed and debugged.

I finished assemble of my Z-80 CPU V2 card recently however it still has an issue I need to resolve before I jump back into the MSX2 debug work.

That's about it.


Attachment: As-Built.docx
Description: MS-Word 2007 document