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Re: S100 VDP success
On Apr 1, 12:37 am, Elsid <le...@swiftdsl.com.au> wrote:
> Hi Andrew,
> The additional caps across the V9938 power pins are an attempt to make the
> video less noisy. They didn’t seem to have much effect. I suspect the noise
> I’m seeing on the video signal on the CRO may be due to the routing of the
> power lines for the video amp through the dynamic RAM circuit. (lots of
> hash from the refresh?) Maybe the video output could be routed away from
> the RAM and separate traces for the video amp power from the
> regulator provided.
Hi Leon! Thanks! Yes, the placement of the VRAM next to the
composite video connector was a bad idea. It seems obvious now!
I will reposition the VRAM for the next prototype board design.
Better part placement and improved grounding would help too.
> The extra pull up on DHCLK p3 of the V9938 (and cut trace to R53) is there
> because I was worried that the 5.37MHz output would be doing something to
> the LightPen inputs LPS and LPD.
I will add that pull up resistor.
> The 470 ohm pull downs on R, G and B outputs (p22, p23 and p24) on the
> V9938 are there because I suspected I may have damaged the COMP_VIDEO
> output (p21) and needed the pull downs to get the internal transistors to
> drive – the output was OK as it turned out.
It sounds like these are not needed.
> The reset circuit needs some changes. The V9938 is not receiving a “power
> on” reset because BRD-RESET* is being gated by SYNTMS* at U27C. (SYNTMS* is
> reset at turn on by BRD-RESET*). The V9938 has to the manually reset by
> toggling SYNTMS*.
Yes, this is a left over from the N8VEM SCG. The TMS9918 and
AY-3-8910 were both manually reset by the latch to enable the builder
to regain control from them in case they went "nuts"
> I have tried the FMS6141 video amp configuration and it works fine.
> Parts of the board working/not working:
> 1. Address decoding – working but could do with changes to make more MSX
> compatible – as you’ve said.
Yes, I've rearranged the V9938, RAMDAC, and latch so it should be more
> 2. Reset circuit – only working manually – see comment above.
That's per design but maybe unnecessary here. Is this worth keeping?
> 3. Composite video output – working but noisy – power routing?
Yes, bad part placement on my part. At least its generating video so
it shows "proof of life" but the design needs work.
> 4. Video RAM – working – I tried adding in 100 ohm resistor in the RAS,CAS
> and R/W* lines (like some MSX2 designs I’d seen) to reduce ringing. It
> didn’t reduce the video noise but it may be a good idea anyway.
> 5. BT478 – I haven’t tried yet but maybe we can route the RED, GRE and BLU
> outputs to a header for a DBS15 connector to drive a 15kHz VGA monitor.
Maybe try rigging up the VGA connector logic circuit from the new
schematic in the prototyping area. If we can use the LM1881 to
generate VSYNC then we are good to go for an NTSC frequency VGA port.
> Best regards
> Leon Byles
Thanks for your help with this project. It is nice to see it moving
Have a nice day!
> On Sunday, 1 April 2012 00:00:57 UTC+11, lynchaj wrote:
> > Hi Leon! Thanks! I am updating the S-100 VDP design and would like
> > some clarifications.
> > I see the data lines on the V9938 are reversed. That's a carry over
> > from the N8VEM SCG board. Apparently the TMS9918 *did* flip the data
> > lines and I carried that over but it wasn't necessary.
> > So far, I've fixed the V9938 data bus but I see from your photos there
> > were several other changes. Additional capacitors and what appear to
> > be pull up resistors on the V9938. Also the data lines going into the
> > BT478 and also picking off signals from the U7 data bus latches. I
> > presume those are data lines?
> > Have you had any luck accessing the BT478? John Coffman was able to
> > get it to work on the uDP7720 board. I think the first step is to see
> > if its registers are responding. In theory at least the BT478 RAMDAC
> > would allow the VDP to produce VGA like signals. They would still be
> > the lower NTSC like dot clock but should still work on modern LCD
> > monitors.
> > My plan is to add in the AY-3-8910 sound generator and the joystick
> > interface from the N8 board.
> > Also to rearrange the IO decoding so the V9938 can appear at x8H
> > addresses.
> > Are there any other changes we need on this board?
> > Would it be possible to list out what parts of the board work and
> > which don't?
> > It seems the the V9938 is working so that implies the VRAM subsystem
> > is working. Also the IO decode is at least partially working.
> > Thanks and have a nice day!
> > Andrew Lynch
> > On Mar 19, 7:57 pm, Elsid <le...@swiftdsl.com.au> wrote:
> > > I’ve finally had some success getting video out of the prototype S100-
> > > VDP board.
> > > The first thing I found was the data bus on the V9938 swapped around.
> > > That is, D7 was wired to CD0 not CD7, D6 was wired to CD1 not CD6 etc
> > > down to D0. I think this may have been an early error on one of the
> > > prototype N8VEM VDU boards also.
> > > I correct the Data bus swap around but still no video output on p21
> > > COMP_VIDEO or P22,23or 24 (RGB). I should say there was actually a
> > > composite video signal complete with color burst and synchs but there
> > > was no video component on the top half of the waveform. I tried
> > > another V9938 – same result. I pulled out the BT478 to just try and
> > > get the V9938 part going on its own. Still no luck.
> > > Finally last night Wayne posted that he’d found some problems were
> > > caused on the N8VEM Color VDU board when the VT82C42 is not reset. I
> > > looked at the VDP reset circuit and found that the V9938 is not
> > > receiving a reset because BRD-RESET* is being gated by SYNTMS* at
> > > U27C. SYNTMS* is reset at turn on by BRD-RESET*. – Thanks for the
> > > inspiration Wayne.
> > > I’m not sure what the function of SYNTMS* is. If it’s to enable a
> > > programmable reset for the V9938 we may be better off inverting it and
> > > eliminating the inverter U11F after U27C. This should give us a reset
> > > from either SYNTMS or BRD-RESET.
> > > I was using a modified version of HW9918.COM to test the VDP board so
> > > I added a couple of lines to toggle the SYNTMS* signal to reset the
> > > V9938 in the initialization section and Bingo – “Hello World” popped
> > > up on the screen.
> > > I’ve put some photos and the test program on the N8VEM site at:
> > > for anyone who is interested.
> > > I set the address base to 90H but maybe it would be nice to change
> > > this to 98H (start of the V9938 registers) for MSX2 compatibility. I
> > > think it will need some rewiring in the address decoding.
> > > Next step is checking out the BT478 and maybe VGA output.
> > > How’s everyone else going with their VDPs
> > > Leon Byles- Hide quoted text -
> - Show quoted text -