A Z80 SBC on an S-100 card would be awesome!!!! I've prototyped and tested a number of the subsystems for one. I'd try to make one myself, but I don't know how to do the CPU<=>S-100 bus part, and I have limited KiCAD skills.
It would be best (IMO) to have a serial port for console, with SRAM, EPROM,and a CF interface. Maybe even a RTC so that the board could be used for something like UZI, or one of its variants? From what I've heard, maybe bit-banging SPI or I2C with a Z80 would be disappointing -- speed-wise. I have built a simple CF interface to put one on the S-100 bus, and it works great. Very fast. Just 8 TTL chips (no PPI). It allows direct interface to the CF registers. Details on my Web site (www.hanscom.us). The trick is to put the CF into 8-bit mode with no-cache. I have looked at the resulting CP/M file systems (three 8 MB "drives"), and there is no apparent loss of capacity. Full 512-byte sectors, and the classic DRI block/unblock code works well with it.
I have also built a number of Z80 SBC prototypes using the 74LS670 to extend the Z80's address space. The idea was originally proposed by Francis Gormaker (I might have spelled that wrong -- do a search to see his two-page proposed design). He proposed 16k pages, and I have built that. It works well, but only extends the address space to 256k. I also built an SBC that uses his basic idea, but supports 32k pages (and gives access to 512k). Both designs have advantages and disadvantages. I think it would be easy to provide access to either with a few jumpers. Very minimal chip count. Details are also on my Web page.
Using the Z180 would be nice, but there is something odd about the on-chip UART. I found that the IN A,(C) and OUT (C),A opcodes work sporadically. I think that it has something to do with the way the Z180 puts the port address on the address bus? Zilog corrected the situation with the "regular" IN and OUT opcodes by extending the instruction set with IN0 and OUT0. BUT, there are no corresponding extended opcodes for IN A,(C) or OUT (C),A. If you don't use those opcodes, the Z180 is very nice. However lots of CBIOS code does use them. I built a Mark IV, and it suffers from the same problem,so it just wasn't my prototypes. I haven't found a work-around for it. It would probably be possible to get around it by using another UART, but then, what's the point? Lots of details about the Z180 "problem" on my Web site as well.
(disclaimer: all of my tests for S-100 stuff have been carried out on a 4 MHz CPU (CompuPro) and CP/M 2.2. I have built a lot of SBCs with the Z80 and Z180 (with CF interface) and they all ran well at 10 MHz. I just don't have access to a faster S-100 Z80 CPU.)
Roger