Hi John, On this 65902 board… First it is very important to understand that this is NOT an IEEE-696 compatible board. In fact it will not work without fairly extensive modifications in those systems. It is meant to run in the early S-100 IMSAI/Altair boxes that for example do not expect 24 bit addressing etc. that typically run at 2MHz I am almost complete writing up a web page about the board (see draft here):- http://s100computers.com/My%20System%20Pages/6502%20Board/6502%20CPU%20Board.htm I will announce here when done. So as to your speed question, I just tested it and it runs at 6MHz (but not 8MHz). However the first thing the clock generator circuit does is divide the clock oscillator by two! So 3 MHz. Should respond to other slow(er) I/O boards. There is no wait circuit for the ROM on that board so 3 is probably all you will get. Have not done jumpers yet in write-up. Sorry, just starting here. That board is a copy of an early board (~30 years ago) I believe – I don’t remember which S-100 board unfortunately. Nor I did participate much in its layout – was doing the 8086 at that time!. I am currently writing a very simple 6502 ROM monitor for this board. It will be modeled like the Z80 monitor in terms of commands. Now the good news is Andrew, Neil and I have just completed the design of a V2 of the above board that is completely IEEE-696 compatible, has an EPROM wait state generator circuit, more flexible IO/ROM space mapping, a simpler circuit, and it can run alone in the bus or as an alternative CPU (master/slave, IEEE terminology)) along with a Z80, 8086 etc. Will put up a schematic in a few days. However this board is a few months away. Will have to do a prototype first. As to schematics, I personally find the best board schematics are those on large sheets of paper where you see all connections at once. Really cuts down on page flipping errors. Most of Andrews schematics are this way. This one is sort of a hybrid with separate sections – again I assume arising from the boards origins. What I do is actually blow up the schematic PDF file and print out the pages in sections, cut them and tape them into a page 2-3 fee square. This really makes understanding what is going on easy. You can also go to outfits like Kinkos and have them print out a large page. It does not cost much. If you have time perhaps you could do 5X11 sections for others. We can then post them. John John Monahan Ph.D mon...@vitasoft.org From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of j...@cimmeri.com
Hi! The S-100 6502 CPU boards are with their builders and seem to be working. John has written up a page on S100computers.com on bringing up the S-100 6502 CPU board. http://s100computers.com/My%20System%20Pages/6502%20Board/6502%20CPU%20Board.htm We are incorporating the changes necessary for S-100 6502 CPU board V2 to be IEEE-696 compliant with TMI circuitry. The changes necessary are quite extensive. However, if other builders would like to make further changes please contact me. There is a large prototyping area on the V1 board to support the new circuitry. The schematics, PCB layout, parts list, and test software other information is on the N8VEM wiki http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder¶m=S-100%206502%20CPU%20board%20V1 There are still plenty of the S-100 6502 CPU board V1 PCBs left so if you would like one or more please contact me. They are $20 each plus $3 shipping in the US and $6 elsewhere. Thanks and have a nice day! |