Re: [N8VEM-S100:2446] Re: Board Run: Unbuffered Prototyping

Subject: Re: [N8VEM-S100:2446] Re: Board Run: Unbuffered Prototyping

Date: Fri, 21 Feb 2014 02:12:20 -0500

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Although those all sound like interesting enhancements, the result is a bit different than an "unbuffered" prototyping board. I'm really interested in retaining the maximum amount of uncommitted sea-of-PTH and minimum commitment to additional circuitry. Ideally that would include reducing the current commitment to three voltage regulators. Perhaps one or more could be jettisoned?

It's, of course, your design. So I'm "holding tight" until seeing how much real estate gets chewed up by your additions/modifications :->.

I don't s'pose that your potential supplier would accept two designs to split the 100-count?

On Thu, Feb 20, 2014 at 9:54 PM, Crusty OMO <crus...@hotmail.com> wrote:

Group,

Besides wanting to add the buffer chips in a low profile out of the way fashion, I was also thinking to make a few other small changes. Presented here for your approval.

-Add some power on LED's to top of board.
-Add a DB-9 foot print over top the .1" matrix of holes, if the space is needed for a chip, it can be placed over top the DB-9.
-Add the buffer chips, but keep them as close as possible to the edge card connector, thus allowing maximum space for prototyping.
-Redo the silkscreen so there are lines in a grid of 10 by 10 holes (presently, I think it's 20 by 20)

I'm not sure if KiCad can be switched to a manual mode to allow such overlapped pattern of components/holes. Time to learn.

Regards,
Josh

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