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RE: [N8VEM-S100:7324] V3 Dual IDE/CF S100 Bus board initial checks



Hi, JeffA

 

Back when I first built my IDE/CF v2 board last summer, I had it running with the application program I downloaded that went along with it.  Maybe that was the MYIDE program, I cannot remember for sure.  But whatever it was, it did run properly on my CCS 2810 CPU board with a CCS 2422 in the cage as well.  The problem I had was I could not get it to run as a BIOS driver CP/M 2.2.  I don’t believe it was hardware related.  I think I was just having difficulties writing the driver for it in my much-modified CCS CBIOS, which has built in Blocking/De-blocking for disks larger than 128 B/s.  So after reading up on CP/M 3 I discovered that CP/M 3 has blocking/de-blocking built into the BDOS, making drivers for different disk controllers easier to handle.  So I decided to get a CP/M 3 system running, then work on getting the IDE/CF board functioning for it.  That decision has spawned a plethora of related projects, including a whole new S-100 computer just for debugging hardware and software, and a new 8-bit memory card with more than 64K and with a MMU to support Banked CP/M 3.  This board also has what I am hoping will be everything I could ever need in a hardware debugger. (See my posting about a week ago about the new version 2 of the Mem8Plus for details.  Status: I just finished simulating the last of the 12 GALs on this board and am just starting power estimates and power supply design.)

 

I hope this helps answer your question.

 

Bob Bell

 

 

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Jeff Albrecht
Sent: Saturday, June 27, 2015 5:11 PM
To: n8vem...@googlegroups.com
Subject: [N8VEM-S100:7324] V3 Dual IDE/CF S100 Bus board initial checks

 

I'm checking in with a progress report and to say thank you John for the board and the mailing to all of us. And thank you Gary for burning the GALs and mailing them to me.

 

This v.3 is my first experience with the IDE/CF board. I've installed all the non socketed parts, verified voltages and then the two GALs. Rather than use my front panel or non existent monitor board (except a CCS Z80 CPU more on that later) I assembled and ran this small program on a stock (except the disk I/O) Altair 8800b to exercise the ports.

 

                ; jha 6/27/2015 testport.asm
                
; test the S-100 IDE v.3 port addressing
                
;
 
0100                   org     0100h
 
0100 DB30              loop:   in      030h
 
0102 C30001            jmp     loop
 
0105                   end

 

Before I run the program I clip on the logic analyzer of my S-100/N8VEM extender to pin 23 of GAL 1 ADDR_8255* it's HIGH. I run the program and I get a couple visible cycles/pulses then the HIGH and LOW lines are cycling so quickly I can't see them cycle anymore. The LOHI and HILO transition leds are on too. <pause> May as well put a scope on it. I've got a pulse width 480ns at 100khz. I'm not seeing it on the 8255 pin 6 CS*

 

Looks good right? I'm a bit curious about the initial ?settling? time when I first start the test program. I'll move on to some of the other tests I see in the v.2 notes.

 

Has anyone, maybe Bob Bell, ever run the MYIDE ROM on the California Computer Systems (CCS) 2810 Z80 CPU? 

 

Does anyone have a system generated for a CCS 2810CPU, CCS 2422 floppy controller and the IDE/CF card?

 

 - jeffa KF7CRU @jhalbrecht / @TheRetroWagon

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