Date: Wed, 17 Jun 2015 16:20:50 -0700
From: geka...@gmail.com
To: n8vem...@googlegroups.com
Subject: [N8VEM-S100:7236] Possible 8086 board run
I'm hoping to have enough interest to justify another run of the 8086 S-100 board that John did a few years ago.
Thanks to John's help I have files for a slightly updated version of the board on www.s100computers.com
- improved and corrected silk screening
- the ability to use
three options for the TO-3 regulator as per the other new boards
Per John's comments, the other limitation:
"the design of that board was my very first S100 bus slave CPU board. It did not really have the master/slave circuit flushed out properly. It's absolutely fine as a slave but if setup as a bus master it would have to be modified to pass control to another slave. (Its address, data, status & control lines would have to be inactivated by the slave when it has control) The IEEE-696 is unclear who does this, but normally the bus master inactivates its own lines. Except for the similar 8088 our other CPU boards have the appropriate circuits."
Please let me know of any interest - hopefully we can get a run together.
(I'll also price it out thru PCBWAY given Don's recent posting)
- Gary
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