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Re: [N8VEM-S100:994] Clock generator for S-100 80386 Board.



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If you where also to use an i82385 (or so) cache controller with a
small amount of on-board fast static RAM, then I think you could
maintain pretty decent performance by avoiding a lot of S-100 bus
transactions.

- --Mike

On 07/20/2012 05:17 AM, Pontus Oldberg wrote:
> John,
> 
> I would recommend you build a 386 local bus <-> S-100 bridge. This
> bridge would generate all S-100 signals with correct timing and
> relationship while holding the 386 in wait state. This way you can
> run the S-100 bus at max speed while slowing the processor down
> only while accessing the bus. I guess a CPLD or a few PLD's and
> buffers (which you already need) would do the trick.
> 
> /Pontus


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