Do you happen to have a 74L02? Try slewing the FF clock signal its pin 3, 47pf to ground. Finally, bypass U17 completely (bend out its pin 4, jumper 3-4 on the back of the board, disconnect R34. John From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Thomas Owen UPDATE: All, During assembly the board passed all the 'in progress' checks. The final steps were to output to different ports:
QO33,80 ; Configures ports A, B and C as output ports QO32,2c; Selects middle pair of digits QO32,2d; Selects left hand pair of digits All displays are correct. Now the final step is the Drive Select and that is where I am having trouble: Board always comes up with 'Drive A' selected Now, QO34,0; no change Reset, start again: QO34,1; no change I can never select drive B. Several generous members (thank you David Fry) have made suggestions, and here is where I now stand: My preliminary check this afternoon shows me that there is a timing issue at U15, the 74ls02. Using my logic analyzer and monitoring the inputs and the output (which clocks the drive select flip flop) I see a big timing difference between SEL_SECOND and WR. What this means is that the output of the gate never goes high allowing the bit change to effect drive change/selection. I am going to get some screen shots from the analyzer tomorrow, and if anyone has any suggestions I would greatly appreciate it. Thanks, -- |