I just finished assembling the board, testing as much stuff along the way as I could with the Z80 board. Things seem to work fine, but I have a few clarifying questions. I hope to use this board, initially, as a proxy for the Seattle Computer Products CPU Support Board as part of a system re-creation/demo project I’m working on. I have the SCP-200B 8086 board, the Cromemco 16FDC, an SSM IO4 (console card) and a CompuPro RAM22 (which subs for several SCP 16k memory boards). I hope this will approximate the system Tim Paterson used to create 86-DOS.
Here are my questions:
- The EEPROM configuration and test procedures for the V2 board mention jumpering K1. There is no K1 on the V2 schematic or on the board (that I can find). Is this a typo? I found all of the other jumpers in that procedure.
- Jumper setting for K5 isn't mentioned in the procedures (assuming not jumpered).
- Jumper setting for JP6 (4.7k pull-up on the board select line) also isn’t mentioned (assuming not jumpered).
- Default jumpering for P39/P37/P53 (VI settings for the RTC). Assuming not used.
- How are people connecting the keyboard interrupt (P54.15) to VI1 (P54.4)? I would assume wire wrap wire but I wanted to check. Important for MSDOS.
Are there any other gotchas I should be aware of? Thanks!
Collector of Classic Computers
Build Master and lead engineer, Altair32 Emulator