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Hi Jeff,
That should work (if you're not trying to run my firmware or the CP/M it loads). I did test the design using external RAM boards. By removing the jumper in JP8 & JP9, the board should be accessing the S-100 bus for RAM in the following address ranges. Left jumper 0-0x1FFF 2nd FTL 0x2000-0x3FFF 3rd FTL 0x4000-0x5FFF 4th FTL 0x6000-0x7FFF 5th FTL 0x8000-0x9FFF 6th FTL 0xA000-0xBFFF 7th FTL 0xC000-0xDFFF Right Jumper 0xE000-0xFFFF I don't know much about ddt, so I can't help you there, but if you can wait until after VCF East (in 2 weeks), I can take the time to test my board and see if I am getting the same results. PS. When I did my tests of these jumpers, it was for the first and 2nd blocks of 8K only... I didn't test every block figuring if it can work on the first 2 blocks, it should work for all. V1.2 (and V2.x) loads the "menu" (to select Monitor or boot CP/M) at address 0xDB00. So with the 7th jumper out, there better be some RAM to cover 0xDB00 to 0xDFFF on the S-100 bus. Just to be clear, it's the MENU and Monitor that sit at 0xDB00, when you load CP/M, CP/M's BIOS starts at 0xEE00... here's a snippet from the listing file... 2449 EC2E CCP .EQU (MSIZE-7)*1024 ;START OF CPM (D800) 2450 EC2E BDOS .EQU CCP+806H ;START OF BDOS (E006) 2451 EC2E BIOS .EQU CCP+1600H ;START OF BIOS (EE00) You can see the Command Processor actually loads at 0xD800. The monitor is my own work, pressing <ESC> usually is the cancel button. Regards, Josh Date: Sat, 4 Apr 2015 15:32:18 -0700 From: jeffrey.h...@gmail.com To: n8vem...@googlegroups.com Subject: [N8VEM-S100:6687] JAIR Josh's 8080a replacement board JP8 Jumper Memory disable I'm attempting to test some Solid State Music SB1 Music Synthesizer Boards. They can be addressed as memory, dip switch configurable, from 32k.
I'm using Josh's 8080 Imsai Altair Replacement board running v1.2 ROM. I want to cut a hole in the onboard RAM so I can address the SB1 card at the hole. I'm trying to open up at 48k 0xC000. I removed the 7th from the left jumper on J8. The J9 jumper is open. I fired up ddt to prove I couldn't write to memory at that address with the SB1 removed. I filled ram by entering: "fc000,cc00,ab" then dumped memory with "dc000" The dump showed that I had filled memory by reporting several lines of 'AB' if I didn't have memory available at 0xC000 I shouldn't be able to alter it correct? I'd expect all 0xFF or 0x00 true? So it appears that I haven't disabled an 8k block of memory at 0xC000. Am I reading and understanding the JAIR v3 pdf docs correctly? Can I block out onboard memory so that I can use external memory and still boot cp/m from the JAIR? By the way I tried the Dump in the Monitor but didn't grok all the syntax. Is there some syntax documentation for the Monitor? It's based off the N8VEM monitor isn't it? What key would terminate a Dump when 'Press any key to continue' is displayed? -- You received this message because you are subscribed to the Google Groups "N8VEM-S100" group. To unsubscribe from this group and stop receiving emails from it, send an email to n8vem-s100+...@googlegroups.com. For more options, visit https://groups.google.com/d/optout. |