HI Neil! Thanks! I am thinking they way forward with the S-100 Utility board is to first make the “slot 0” RAM/ROM work even if everything else needs to be disabled and/or hardwired. Without the ability of the CPU to boot from the ROM there is no way for the system to start so maybe it is really just the “slot 0” 32KB ROM which needs to be present after reset. It would be nice if the 8255 PPI worked but if it is getting in the way how about hardwire the ROM so it shows up on the bus for memory reads and disregard/remove everything else. Once the ROM function is working we can work outwards from there. The circuitry for a bare 32KB ROM on the S-100 bus is pretty simple assuming only an 8 bit data bus and 16 bit address bus. Once the ROM is working then get the RAM to respond to memory reads and writes. How is that for a plan? Thanks and have a nice day! From: Andrew Lynch [mailto:lyn...@yahoo.com] Hi Neil The S-100 Utility board design is intended to default to "slot 0" which is the 32KB ROM and 32KB RAM. I take it you cannot see the 32KB ROM with the CPU without code to configure the 8255? If so, then there is a "chicken and the egg" problem. It is the only ROM in an MSX system other than those plugged into the cartridge port. Is the 8255 port A coming up after reset as an input port? If so, it may be possible to add pull-up/pull-down resistors to force a configuration on the port pins even if the 8255 is not initialized. Unfortunately I cannot see the schematic at the moment so I will have to take a look later today and see if I can think of any ideas. If you could run code on CPU from a ROM how would you configure 8255 port A? As an output and with what values on the pins. If port A is an output with 0x00 or 0xFF on it then all we need is a SIP for pull-up/pull-down resistors. Thanks and good luck! I appreciate you taking this project on. I know it is frustrating! From: nbreeden <nbre...@me.com> I'm continuing to have issues trying to access the 32K ROM / RAM on the MSX2 Utility board. There seems to be a pretty basic issue with the design. The 8255 A port need to be configured to enable slot 0 where the EPROM and RAM are mapped. To configure the 8255 I need to be able to run code in the EPROM; I can't however access the EPROM because the 8255 isn't configured. Any suggestions? -Neil
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