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Re: S-100 6502 CPU poll

Hi John!  Thanks!  Understood, your plate is full!

After mulling this over a bit though the V1 S-100 6502 CPU board may
be an acceptable compromise as it is now.  The circuitry to add SRAM,
IO, and/or TMI functions are fairly well understood.  The V1 board
also includes a lot of prototyping space so if an advanced builder
wants those features just add the circuitry and send the schematics to
me to incorporate in the V2 board.

Thanks and have a nice day!

Andrew Lynch

On Nov 25, 10:48 am, "John Monahan" <mon...@vitasoft.org> wrote:
> Andrew, I cannot remember, but if not already down put me down for two
> boards of current "V1" version.
> I would like to help setting it up as a master or slave CPU board as we did
> for the 8086 and 68K with onboard ROM's etc. but unfortunately I am backed
> up here on the MSDOS support board, VGA board and 80286 board and presumably
> the V2 of the 68K board.
> If anybody has time they can probably fairly easily splice in the S-100
> master/slave transfer circuit I did on the 68K V2 board (as well as an
> EEPROM). The 6502 and 68K are fairly similar from a hardware signal
> perspective.  Attached is the latest 68K prototype currently being trace
> optimized. It is based on the essentially same 8086 S100  handover circuit
> that has been very reliable and well tested here.
> John
> John Monahan Ph.D
> 510-502-5890
> mon...@vitasoft.org
> -----Original Message-----
> From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On
> Behalf Of lynchaj
> Sent: Friday, November 25, 2011 7:05 AM
> To: N8VEM-S100
> Subject: [N8VEM-S100:493] Re: S-100 6502 CPU poll
> Hi Leon,
> Thanks!  Currently there are 11 builders on the S-100 6502 CPU board waiting
> list.  Of course that list is quite old so it is suspect.  I am trying to
> decide whether to "snap a baseline" with the current configuration (bus
> master only with no onboard IO or SRAM) or to wait until more modifications
> are complete.  Rich (the original designer) has recommended we go to
> production with the board in the current configuration.
> Given the specialty nature of the S-100 6502 CPU board I suspect there is a
> much higher likelihood of a V2 board becoming reality if we snap a V1
> baseline where it is right now.  The board is fully functional as Neil
> already demonstrated.  Supplying a less-than-optimal V1 version would give a
> wider variety of builders a chance to make the necessary modifications to
> get to a V2 version thus increasing its likelihood of actually happening.
> Like any of the S-100 boards, we still need about 20 boards for builders to
> get to an economical level for a PCB manufacturing order.
> So I guess that's the question to the S-100 builders; do we get a working
> but basic V1 S-100 6502 CPU board now (high likelihood) or wait until a
> better version V2 is available but may not happen?
> Here is what I propose.  I will wipe the waiting list for S-100 6502 CPU
> board and if you want one or more of these please either reply to this
> thread or send me an email.  If we get to 20 boards or so I will make a PCB
> manufacturing order.
> Sorry to bore everyone with droll economics of this but it often comes down
> to such mundane decisions when making hobbyist PCBs.
> Thanks and have a nice day!
> Andrew Lynch
> On Nov 25, 2:19 am, "Leon Byles" <le...@swiftdsl.com.au> wrote:
> > Hi Andrew,
> > I would be interested in getting a 6502 board now if you can get
> > enough takers for a production run.
> > It looks like a nice board to play with.
> > Leon  Byles
> > -----Original Message-----
> > From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com]
> > On
> > Behalf Of lynchaj
> > Sent: Friday, 25 November 2011 6:54 AM
> > To: N8VEM-S100
> > Subject: [N8VEM-S100:486] S-100 6502 CPU poll
> > Hi,
> > Thanks to Rich and Neil for their hard work, the S-100 6502 CPU is
> > basically ready to go.  However as it is currently configured, it is a
> > bus master CPU with boot ROM only.  It does not support the Temporary
> > Master Interface for multiple CPU bus masters and it does not include
> > any SRAM or IO peripherals such as serial ports, parallel ports, or
> timers.
> > Eventually, I would like to make the S-100 6502 CPU support TMI and
> > also include some additional SRAM and IO.  However that is probably months
> away.
> > Would the S-100 builders be interested in a S-100 6502 CPU board V1
> > which captures the current CPU and boot ROM only?  If there is enough
> > interest, I could do a production run of these boards and later
> > include the SRAM, IO, and TMI interface.
> > Ideas, thoughts, all welcome.
> > Thanks and have a nice day!
> > Andrew Lynch
>  Printing S100_68K-sch5.pdf
> 455KViewDownload- Hide quoted text -
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