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Re: [N8VEM-S100:7289] IEEE 696 compliance/non-compliance



Thanks for the input, Bob.

>> To add to what has already been said, I believe the /Phantom signal is not being generated >> properly.  As it is, and even with the OC driver as recommended, the /Phantom signal is
>> always asserted when the port FF flip-flop is in its reset state, that is, Q is low.  Sure, this
>>gates the EPROM /CE pin low when ANDed with A15 low.  But then, and until the state of
>> the F/F changes with another port FF write, RAM is not accessible.  Maybe this is the way
>> it’s designed to work, but the original intent of /Phantom was to overlay RAM with ROM.
>> When the ROM is addressed, /Phantom is asserted which disables RAM at that address.
>> When RAM is addressed outside the range of the ROM, it works normally.  No I/O port
>> needed.  This circuit keeps /Phantom asserted and does not permit RAM to be active at
>> addresses outside the range of the ROM.  Thus, the ROM can be read, but no RAM is
>> available.  If the intent was to have ROM at 0000H, up through 7FFFH, and RAM from
>> 8000H to FFFFH, then I believe the /Phantom signal should be taken from the output of
>> the 74LS32 OR gate.

OK, I see what you're saying.  Perhaps I need to re-wire this so that *Phantom is generated from A15 ORed with board select?  I'll try that (with an O.C.) gate.

BUT again, I don't think *Phantom is the problem here.  My 64k static RAM card has a "half phantom" option.  By asserting phantom with that option enabled on the SRAM card, the lower 32k of SRAM is disabled.  SO, with the CPU-Z (CompuPro) CPU card in place, when I power up the box, I can see the contents of the wire-wrap EPROM (27C32) at address 0-7FFF, the two 2716 EPROMs on the CPU card at 8000-87FF and 8800-8FFF (I hope I got that right!), and the SRAM card from 9000-FFFF.  It all works perfectly.  I can run a memory test on 9000-FFB0 (can't touch the monitor's stack area in high memory), and it passes.  If I write anything to port "FF", the memory map is 0-7FFF is SRAM, 8000-8FFF is the EPROM on the CPU card, and 9000-FFFF is more SRAM.  Memory tests on the two SRAM segments passes as well.

When I swap a ZPU card in (no other changes), the box is dead.  The same monitor that runs from the two 2716s on the CompuPro CPU is in the 27C256 (relocated to ORG at 0h), and the ZPU is configured to power-on-jump to 0h.  And, just to be sure, with the CompuPro CPU in the box, I can execute the monitor that resides at 0h in the 27C256, so I'm pretty sure that the monitor code in the 27C256 is OK.

Roger