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RE: [N8VEM-S100:4765] Progress with the 8080 board



On #2 perhaps a jumper Josh,  pins 1,19 of a 244 to ground/+5.  The problem with not decoding 8 bit ports is that they appear on every 256 byte boundary  for 16 bit systems.  With multiple boards it also becomes hard to actually find blocks for address ranges.   

 

The Z80 is normally used with an 8 bit I/O port address space.  However the full 16 address lines are in facts sometimes used. The high 8 bits do actually have some value. For  IN r,(C), or  OUT (C),r, and the Block I/O instructions, the Z80 actually places the entire BC register on the address bus. Register C is the “normal” 8 bit port address but if need be, the contents of the B register can be decoded from the upper address lines. This was done in some hardware (interfacing PIO’s I seem to remember).  For the common  IN A,(n) and OUT (n),A  the Z80 puts out 0H on the upper address lines.    The 8080A on the other hand I seem to remember duplicates the lower 8 bits on the upper 8 bits for IN & OUT instructions.    By having a jumper you get more bus flexibility and allow later 16 bit CPU to splice in more easily. 

 

On #3 definitely PULLED to ground via a 74LS244 with grounded inputs on the other side when this board is active (only then). The same approach for #2.

 

John

 

 

 

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Crusty OMO
Sent: Thursday, July 31, 2014 6:51 PM
To: n8vem...@googlegroups.com
Subject: RE: [N8VEM-S100:4765] Progress with the 8080 board

 

Hi John,

Yes, I've got a V2-Ideas text file open.
1. MWRT is on the list.
2. This is not a good idea, some of the vintage boards decode the I/O using the high address lines (which I think is suggested in the 8080A Data Sheet).
3. A16-A23... should these be tied to GND or pulled down to GND with a resistor network?

Thanks,
Josh


Date: Thu, 31 Jul 2014 08:45:33 -0700
From: mon...@vitasoft.org
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:4764] Progress with the 8080 board

We should probably keep a "to do list" for V2 Josh.

 

1.   Add MWRT with jumper.

2.   For I/O port data out, address lines A8-A15 should be pulled low. (so only ports 0-255 addressed).

3.   Address lines A16 to A23 always pulled low (in "master" mode)

 

Space is tight on the board as it is.  #2 & #3 will require 74LS244's.  You can shave off some space for the SD card transistor etc. As best I can tell  E2 pin 10 does not do anything.

On Wednesday, July 30, 2014 5:24:51 PM UTC-7, Crustyomo wrote:

John,

Thank you for testing this out and getting it working.  I'm not having the same pull up problem on sOUT.

This board was designed for use with the ALTAIR and IMSAI FP boards, but I agree and in V2, I will add mWRT generation and jumper select it for the flexibility.

You are right about the high address bus.  The 8080A places the I/O address on both the upper and lower 8 bits.  On my initial version, I was decoding the upper 8 bits for use with I/O and Memory banks, but later changed to add it's own decoder chip on the lower address to support Z80 CPU's that might want to access this card as a peripheral.

What should I do with those upper address lines?  Should I just ground them? or pull them high/low through a resistor network?
Something for V2.

Thanks for the schematic corrections, I have updated my copy and will release another revision soon.

I should also point out, if anyone is wanting to use the 16550 UART chip,  then RP2 must be changed to 47K.  Thanks to testing with Fabio, he found that the 16550 data bus output is getting pulled marginally high with a 4.7K.  The 47K will suffice to prevent the bus from floating yet not interfere with the 16550's.

Cheers,
Josh



From: mon...@vitasoft.org
To: cru...@hotmail.com
CC: n8ve...@googlegroups.com
Subject: [N8VEM-S100:4755] Progress with the 8080 board
Date: Wed, 30 Jul 2014 11:44:12 -0700

Hi Josh solved the I/O problem (see below).  Since a few others may be in the board assembly stage I thought I would write up my progress so far for the group!
 
I am running the board in my “test box” that has no front panel.   Just the V2-SMB and Propeller Console I/O.  I always start with a minimal system so I don’t “blow out” board drivers etc.
 
First one needs to remember that unlike the Z80,  the 8080 does not treat the upper 8 bits of an I/O port the same way. On our Z80 board (and most others) the upper 8 bits are set ort Zero.  Not so on this board. So on all the N8VEM/S100Computers boards (and perhaps others), ports need to be jumpered so that only the lower 8 bits are factored into port addressing.  All our boards have this option.   Not a nice solution since with 16 bit CPUs the ports appear on every 256 byte boundary.  Setting the jumper K3 to 2-3 on the V2-SMB allowed the routine below to work correctly.
 
The IEEE-696 upper address lines float.  This will not allow 696 RAM boards to work unless they are adjusted.  Our N8VEM/S100Computers boards generally have a jumper to ignore these lines but again will not work with 16 bit CPU’s.  Our V2-SMB has an option to force these address lines to ground when this board is the master but release them for slave/16 bit CPU’s.
 
Second the board does not generate the S100 MWRT signal. (On front panel systems, it’s generated there).  One can be generated on the SMB with the  JP11 jumper.
 
There seems to be a problem with the sOUT signal (s100 Pin 45) on J8.  It’s been pulled high all the time – at least on my board.    I bent out J8 pin 6 and connected it directly to the S100 bus (bending out the pin connection on the extender board). I will try and follow traces to figure what is going on here.
 
Minor schematic errors.
Pins 8 & 9 of E2 are switched.
Pins 1 & 19 of I8 and H8 should be  labeled D-IN, D-OUT, etc.
 
Still a work in progress, but wanted to save others reinventing the wheel.
 
 
John
 
 
 

From: John Monahan [mailto:mon...@vitasoft.org]
Sent: Tuesday, July 29, 2014 7:21 PM
To: 'Crusty OMO'
Subject: Problem with sOUT with the 8080 board

 
Hi Josh.
I running into a bit of a problem with the 8080 board. I use this code
 
BEGIN:0009 3E34         MVI   A,'4'             ;FOR QUICK HARDWARE DIAGNOSTIC TEST
     000B D301         OUT   01H
     000D DBEF         IN    IOBYTE
     000F D301         OUT   01H
     0011 C30900       JMP   BEGIN
 
I can get a “4” on the screen no problem.  But I found no matter what value I have the dip switches for port EF I get a blank on the screen.
With the SMB switches set to 33H one normally see “3’s”
 
Analysis tracked things down to the fact that sOUT was not being generated on the bus.  The LED on the SMB in fact did not flicker.
I bent out pin 6 of J8 and bent out the edge connector pin going to the bus and jumpered J8 pin 6 to the S100 line #45.  Now sOUT flickers (as it should).  I find that pin 45 on the board is being pulled high (and warming up the J8 IC).    Before I dig further, wanted to know if you see this.
 
For configuration..
SMB, Propeller Console I/O board (Ports 0 & 1) and the 8080 board nothing else in bus.
Note have to generate MWRT on SMB -  J11, need to tell people this as it’s not generated on your board if no FP.
I have JP8 LHS jumper open the other 7 closed
JP9 LHS jumper closed all the rest open. 
So 8K ROM at 0, the rest RAM
No R15 jumpers so all I/O ports via bus
JP4 1-2,  JP1 2-3, JP6 2-3, JP7 1-2
 
No A5 ,A6 , J5 or J3 (but J7 is present).
 
John
 

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