Those IDE boards are in fact a very simple boards. Essentially you are just talking to a 8255 three port chip. If you cannot write, you need to determine where the log jam is. Using a simple logic probe determine if the chip CS* lines is going low with a write. If WR* is going low etc. Single step through a simple continuous write loop in RAM. Eg:-
These three screen captures are from my Owon DS7102V connected to pin 23 of GAL 1. The test computer is a IDE/CF v3 card in a CCS Z80 running it's ROM monitor. Similar results were obtained from A CompuPro ZPU running DDT under CP/M. I don't specifically remember seeing the ?glitches? when I ran this simple test on an Altair when I began this theread.
The first image is at idle. The second detail of the ?glitch/spike? at idle (the test program not running). And the third while running this simple program:
0100 org 0100h
0100 DB30 loop: in 030h
0102 C30001 jmp loop
0105 end
The 3rd image of the waveform while the test program is running seems reasonable. True? What about those first two images when the test program was not running? Are they of concern?