Thanks Matt. This deposit and deposit next function is not as easy as it sounds. It depends on your S100 bus setup and how much of the SMB V3 board real estate you can devote to it. If the only CPU in your system is a slow 8080 or Z80 its somewhat simpler. If on the other hand you are using a system with multi CPU master/slaves system and in the 8-10MHz range things get complicated. I think I can get two Hex characters into two 74LS175’s with a GAL and 555. There would be 16 tiny push buttons and a enter button. See attached
However the problem with a S100 IEEE type multi-CPU system is that we need then to setup a true master/slave takeover circuit as we have done for all the other CPU’s. You take control of a TMA line, putting whatever CPU is in control on hold, deposit the data on the data IN BUS, generate a write signal, increment the address , and either repeat of hand control back to the resident CPU.
I know I could do it/fit it on an empty S100 board. I thinking it will not be possible on our current SMB. I’m also considering a Propeller driven approach, but suddenly the project has leap frogged way past what I had in mind.
I’m still brewing….
There's one (hex keypad) on the Quest Super Elf board, but that goes back to 1978. I could scan the drawing for you, but there must be something more recent. It has functions including single stepping and run with monitor. Josh would know this off the top of his head.
Eric, I Have been thinking of deposit, deposit next etc. but with dip switches. Anybody seen a non CPU/simple hex keypad input circuit. I would rather not make this board a computer within a computer.
Hi John -
This may be way outside the scope of what you have in mind, but I'd like to see the ability to add a keypad for doing deposit, deposit next, examine, that kind of thing. Similar to what was once on the Intel MCS 85 SDK and similar systems.
This would truly replace all the functionality of a front panel, and then some.
The V1 and V2 versions of our tried and true System Monitor Board have stood the test of time. It's described here:-
and while it’s only a year ago since we did a V2 version, I’m toying around with doing a V3 version.
As an aside my current aim is to have a core S100 computer system of 4 solid boards:-
A V3 SMB
A 16MB Static RAM board
A V3 IDE/CF Card board
and a 80486 Master/Slave board
(Of course there are and will be other S100 boards in the future -- I working on a Raspberry Pi S100 board),
Anyway I want to get the above core board’s rock solid -- ideally to run reliably at 9-10MHz. I think our Z80 and Propeller/Console IO boards are up to it and the VGA board “should” be OK with the 80486.
Last week we went through the exercise of tweaking the V3 IDE board, thanks, it’s gone for prototyping.
I would like to consider tweaking the V2 SMB, and I’m open to a wish list.
So far I have:-
Run wide power line traces, particularly to the HEX displays.
Label the silkscreen and jumpers better/extensively.
Redo the whole TMA 1-4 line switching circuit to be less sensitive to CPU speeds (for Gary & co.)
Add a row of 0.1” jumpers near the top of the board so essential S100 bus signals can be easily tapped into with the Saleae Logic or USBee logic probes.
Use a few GAL’s to simplify the circuits and get more board space.
GAL Data Entry.JPG
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