Re: An

[Elsid <le...@swiftdsl.com.au>]

Hi Andrew,

I'm sorry I haven't given the S-100 VDP board much attention lately.

In my last effort working with John I saw video coming out of the RAMDAC. It was garbled so I need to sort out what is going on there. If you can delay the next prototype for a few weeks I'll do a bit of debugging to see if I can get correct video out of the RAMDAC.

See below for email re last effort:

I’ve managed to get video out of the RAMDAC. For real this time.

I was looking at the colour bus data going into the RAMDAC along with the CLOCK and BLANK signals.

The BLANK signal seemed to be running at about half the CLOCK frequency. This would mean all of the color bus data was not being accepted as valid.

The BLANK signal is p7 BLEO on the VPU. I bent the pin out and soldered a 1k pull up to the BLANK signal going to the RAMDAC so it was -continuously  inactive.-Now I have Video out p25,26,27 of the RAMDAC but it’s not exactly correct.-I suspect the colour bus data is not correct. I think in the video mode we are using, there is only 4 bits of valid data that are repeated on -the top 4 bits. Also the colour palette order in the VDP is G,R,B whereas it’s R,G,B in the RAMDAC. We may be able to correct these problems -using the Pixel mask register and a reordered RAMDAC colour palette, what do you think?

Leon Byles

On Monday, January 14, 2013 7:08:03 AM UTC+10, lynchaj wrote:

Hi!  The S-100 VDP V3 prototype is almost ready to go.  Are there any builders who would like to build and test this new version?

Were there any more changes from the last round of build and test (S-100 VDP V2)?

 

This board is a V9938 video display processor and AY-3-8910 sound generator.  It is roughly an MSX2 class color graphics and sound board.

I’d like to get some prototype boards if anyone would like to chip a bit for some. 

 

Thanks and have a nice day!

Andrew Lynch