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RE: [N8VEM-S100:1870] A new S-100 Bus general purpose 1MG Static RAM + EPROM S-100 Board.



Just looked at Maxim DS1210 Tom, nice, did not know such a chip existed. Easy to add too. I’m thinking one 3 volt coin battery and an external connector for a second (if needed) and a ground pin.  I assume the 8 pin chip is fine.

My worry about making extensive changes to the board is “screw-ups”. I would like to avoid yet another prototype before the final production run.  It’s real easy to get these jumpers wrong (been there done that on past two boards).    I saw the error (I mentioned it in my previous e-mail) on U4 & U121, Andrew has corrected it.  Did you see any others?.

 

Dual jumper rows, I’m not so sure. Will use up more space. I deliberately placed the pins so side by side jumpers will normally work. Did not want to have to use wire wrap etc.   At one point I was thinking of a square pin matrix, chip pins on one side and inputs along the top. Would be a “rats nest” of wire wrap, but very flexible. Opted for what we have use on the two past boards.

 

John

 

 

 

John Monahan Ph.D

e-mail: mon...@vitasoft.org

Text:    mon...@txt.att.net

 

 

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Tom Lafleur
Sent: Tuesday, September 03, 2013 1:49 PM
To: n8vem...@googlegroups.com; John Monahan
Subject: Re: [N8VEM-S100:1870] A new S-100 Bus general purpose 1MG Static RAM + EPROM S-100 Board.

 

well, at first look, I think both RAM and PROM should have same pin-out and jumpers, either can be ram or prom!

allowing WE on prom, may allow for in-circuit programming of some flash devices!.. but board should have option to disable it.

 

On U4 and U121 pin1 A18, connect to a jumper for BA18 and GND, this is wrong!!!, should be BA19 and also should allow VCC, GND and BA19, this allow user to select upper or lower half of 39SF040 type devices.   same for U100 and U101

suggest using 2x6 (or larger if needed) type headers if their are more that two option for pin to connect too....      its easier to figure out and document than what you have now:  a,x,b,x,c

xxx    x connect to pin

abc   a,b, c connect to optional signal for pin....

jumpers on board should have the same layout for each block...

so one can adjust jumper with out having to look all over the board for them.

Pin 1 need to be marked and K number need to be visible after parts are installed on the board!!!! Many of the older board, you can't find the K number or pin 1 with out looking at board layout drawings!

 

look at zeta z80 board for battery backup ckt.

 



~~ _/) ~~~~ _/) ~~~~ _/) ~~~~ _/) ~~

Tom Lafleur
(858) 759-9692

 

On Tue, Sep 3, 2013 at 1:15 PM, John Monahan <mon...@vitasoft.org> wrote:

See attached

John

 

 

 

John Monahan Ph.D

e-mail: mon...@vitasoft.org

Text:    mon...@txt.att.net

 

 

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Tom Lafleur
Sent: Tuesday, September 03, 2013 12:06 PM
To: n8vem...@googlegroups.com
Subject: Re: [N8VEM-S100:1868] A new S-100 Bus general purpose 1MG Static RAM + EPROM S-100 Board.

 

look at z80 zeta board , did not know that you had updated the schematics

http://n8vem-sbc.pbworks.com/w/page/44366173/Zeta%20SBC



~~ _/) ~~~~ _/) ~~~~ _/) ~~~~ _/) ~~

Tom Lafleur
(858) 759-9692

 

On Tue, Sep 3, 2013 at 11:12 AM, John Monahan <mon...@vitasoft.org> wrote:

Thanks for feedback Tom. Will re-look at things. One thing, are you looking at the recent schematic, the RAM pairs and RAM pairs now share the same jumpers (where possible).    BTW, slight error (being corrected) on prom sockets to allow 1MX8 UV-EPROMs.

 

Do you have a schematic for battery backup, good idea BTW.

 

John

 

 

John Monahan Ph.D

e-mail: mon...@vitasoft.org

Text:    mon...@txt.att.net

 

 

From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Tom Lafleur
Sent: Tuesday, September 03, 2013 10:53 AM
To: n8vem...@googlegroups.com; John Monahan; Douglas Goodall
Subject: Re: [N8VEM-S100:1866] A new S-100 Bus general purpose 1MG Static RAM + EPROM S-100 Board.

 

My first cut on the "new" ver 3 S100 RAM/EPROM board

Make the chip pairs use the SAME configure jumpers

Make both pairs of chips use the SAME pin-out ie; ram or prom in either side, Support RAM on both chip pair.. 28 pin part or larger, this will allow ram or prom to be in lower or higher bank

Remove the jumpers for older and rarely used chips to make the board easy to configure. ie: remove option for chips less that 27C256, or 27C512 (ie: 28pin parts an above)

this will make addressing selection easier..

map address line for RAM using same pins as PROM...  ie: no need for matching data sheet, as Ram is not sensitive to address line mix up...

Allow for use of a battery (CR2032) on board to back up RAM as its done on ZetaZ80 with option for external battery option (3 pins... gnd.vbat.gnd) using a DS1210 (allow for two battery sources)

Support for large 39SF040 with a jumper on A18 to select high or low haft of chip, this will allow multi images in prom 

Keep small 8 bit boot rom, support 24 and 28 pin devices... allow support of using large chip up to 28C512 with hi/low select of extra address lines... to allow multi images in prom

 

 



~~ _/) ~~~~ _/) ~~~~ _/) ~~~~ _/) ~~

Tom Lafleur
(858) 759-9692

 

On Mon, Sep 2, 2013 at 10:08 PM, monahanz <mon...@vitasoft.org> wrote:

[          ]About two years ago Andrew and I made an S-100 bus E-PROM board that could utilize a number or RAM and ROM chips. It proved very popular. All production quality boards were quickly taken.  A second "V2" version of the board was later made. That too went quickly. 

A number of people have requested an "All in One" RAM/ROM combination board capable of working in 8 or 16 bit S-100 systems with pre or post IEEE-696 CPU boards and capable of accepting a wider range of UV-EPROMS, EE-PROMS, Static RAM chips and Flash-RAM chips.  Also in view of the range of chips and CPU's a flexible wait state circuit that can independently assign 0-8 wait states to the above chips would be desirable.  Finally, it would be nice if the EPROMs could be phantom/shadowed in or out  depending on which CPU is controlling the S-100 bus.  For example one normally would not want a Z80 monitor at F000H if the bus has given control to an 8086 in a 1MG address space.  

See here for a description of such a board:-  

http://www.s100computers.com/My%20System%20Pages/RAM&ROM%20Board/RAM&PROM%20Board.htm

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