Guys, after sleeping on it, I’ve decided not to try and incorporate a deposit/deposit next function on the current SMB. This board is CPU independent, and will work with any slave CPU currently on the bus. The hardware break point, single step and address, 8 and 16 bit data are all done in hardware and are bus speed independent. To do the same for deposit and deposit next would not be possible and fit it on the current board – at least with 74LSxx & GAL’s. In contrast to the above current hardware, it’s very hard to justify replacing in hardware simple monitor commands like display RAM, substitute RAM, Go to etc. Granted you have a chicken/egg situation for your first CPU in the bus. But even there a simple ROM get you going.
That said, I still have space on the current board.
So far I have a new cleaned up/simplified TMA 1-4 master/slave switch circuit. (See attached)
A 0.1” jumper array for a logic probe on the top of the board (see attached).
The last data byte sent to a designated port displayed in a LED Bar.
Current bus PHI frequency displayed in a two Digit LED Display
LED Bar pulsing individual Interrupts (8 total ). Need four 74LS123’s. Already on our MDSOS support board!
Halt the (current CPU) when the S100 ERROR* line is asserted displaying the current bus address.
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of Paul Birkel
Presume that the Heathkit PAM is like the Morrow Keyed-Up 8080? (e.g., see: https://archive.org/details/bitsavers_morrowsche77_699793). Depends on ROM+CPU for keypad support. The idea here is CPU-independence, which would be the way to go. But as John notes (later) probably will take a new board to accommodate the necessary circuitry -- the functionality isn't all *that* complicated, but it's still non-trivial to substitute for that CPU+ROM and "simple program".
Perhaps we could treat the keypad-function as a self-contained pendant (thus gaining space off-S100-board), but then one needs to deal with a lot of data/address long-lines that need to be buffered close to the backplane. Could replace the long-lines with a serial protocol with shift registers at both ends? Getting complicated ...
On Thu, Feb 19, 2015 at 7:59 PM, Richard Cini <rich...@verizon.net> wrote:
How about like the Heathkit PAM or 11/34a ODT. Not sure if the PAM used another CPU. The 11/34 used a 4004 but I'm sure there are other methods.
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