In my opinion, orienting IC’s so that their power pin is closer to another IC power pin is trouble. We’ll be sure to get at least one in backwards. Further, it’s not the proximity of a cap to a power pin that has the best results. It’s the proximity of the cap to BOTH power and ground that makes it most effective. I have seen sockets that embed an axial lead cap (most likely 0.1 or 0.047 uF) right into the middle of the socket with the shortest possible lead length for the cap to the power pins of the socket. Never used them, but I would think this to be quite effective, saves time installing bypass caps, saves board real-estate and saves some copper. However, the drawback is these sockets only work for ICs with “standard” power pins, they are (were) considerably more expensive and I have not seen them for sale for many years.
When I design a board, I try to create a very low impedance power supply (runs a wide and as short as practical, and ground planes wherever possible) and I bypass in a grid/network arrangement. My rule of thumb has always been one bypass cap for every 2 to 4 SSI chips, one bypass cap for every 1 to 2 MSI chips, and one bypass cap for everything else. Since CMOS does not create current spikes like TTL, the rules are a bit more relaxed for that technology, but even CMOS LSI I still bypass one cap for each chip. I think erring on the too many side is better than under-bypassing.
My 2 pence.
Thanks for all the feedback. There were a lot of good arguments