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Re: [N8VEM-S100:6010] Dual IDE/CF V2a
Today I tried a version with the simplest possible track and record combination (1024 record tracks --> 256 host sectors per track so no shifting to generate the LBA) and added some debug print outs of read and write calls. The print outs showed that CP/M was sending me expected record and track parameters and I was correctly translating the records into sectors. Since my BIOS had been doing that for decades I was not surprised. Each line then showed the LBA calculated and stored at @lba through @lba+3. I was pleased to see that the code was working as intended.
The bad news is that the correct data was not showing up in the calculated and commanded LBA sectors. No data yet points to sector read versus write (or both) as the culprit.
However, I suspect that the change of the 7403/74LS03 to 74S03 and the large reduction in the associated pull ups from 680 ohm to 330 ohm may be part of the problem as the IDE read and write lines are associated with those components.
Next opportunity (Friday?) I will put the scope on those lines and see if I can see any unacceptable levels. If that is inconclusive I'll hook up my LogicPort for some serious debugging.
The 74S03 swap and the change associated with the drive select signal logic are the only changes to the hardware I have made. Are there others?
I'll let everyone know what I find.