Yoda, I confused, are you working with the original 68K board (the original Wilcox book copy) or the newer master/slave board shown at the bottom of this page:-
Are there interrupt triggering issues with the latter board.
John Monahan Ph.D
From: n8vem...@googlegroups.com [mailto:n8vem...@googlegroups.com] On Behalf Of yoda
If you look at the notes from Pontus 2011-01-06 you will see you have to cut the WE line between the roms and the rams if you are using eeproms. That was not an easy or clear thing to do on the board and I think I had the last V1 board so I decided to for go the memory on board - looking at the V3 schematics I think those changes have been incorporated so I can use the onboard memory - which I plan to be private to the monitor and bios code for CP/M and other OSes that I port.
Mine has not arrived yet. Live on west coast! Will lookout for the connector fingers issue. Will write up a step by step procedure with pictures etc. as soon as I get the board. What is the issue with V1?
John Monahan Ph.D
From: n8ve...@googlegroups.com [mailto:n8ve...@googlegroups.com] On Behalf Of yoda
I have received said boards and just a couple of things to be aware of. It looks like there are some "over pours" of copper near the connector fingers which appear not to short but could possibly short when plugged into the S100 bus so please be careful to check this. If there is a future production run of these boards the gerber files should be cleaned up - I did not notice in the original files but it is pretty obvious when you look at the real boards and this appears on both sides of the boards.
Another fix in the future would be to put the resistor number on the silk screen not the value, ie, R1 instead of 2200 - it makes it harder if there is a need to do debugging and you want to probe at a specific resistor it is hard to know which one is which when referring back to the schematics or vice versa.
I am starting to put together one of the boards and hope to be able to do bring up some time this weekend. I plan to use initially in bus master mode. I think I understand all the jumpers that need to be made and will post a bus master jumper configuration once I have a working board. I have a V1 board that is working so that should aid in getting this board running,
From there I plan on finishing a BIOS for CP/M 68k and will publish that when working. I plan to write the BIOS and monitor code using GCC cross compiler and 95+ per cent of the code should be in C with very little assembly code needed. I have tested some of the code and it is working. I have been waiting for this board to finish as I want to locate the stack disk buffer on the on board RAM away from main memory. There were some issues with V1 that did not allow the on board memory to work without some surgery to the board.
Will post pictures, jumpers and code when I get a little further